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The bit error rate is not a very clear criterion. An acceptable
error rate for one application is not necessarily valid for another. However,
one can make a practical estimation for memories. SET memory technology aims
at the tera-bit (10^{12}) memory chip. If one wants to operate such a chip
for three years (10^{8} seconds) with an average of one bit error one needs a
bit error rate below 10^{-20}.

where
is the rate of the error causing process.
This means that for room temperature, *T*=300 K, the Coulomb energy *E*_{C}should be about 1 eV. Beside increasing the Coulomb energy to reduce the error rate,
error detecting and correcting schemes can obviously further reduce bit
errors.

*Christoph Wasshuber*