Bit Errors

   The bit error rate is not a very clear criterion. An acceptable error rate for one application is not necessarily valid for another. However, one can make a practical estimation for memories. SET memory technology aims at the tera-bit (10¹²) memory chip. If one wants to operate such a chip for three years (10⁸ seconds) with an average of one bit error one needs a bit error rate below 10^-20.
$$\begin{gather}\Gamma_{\text{error}} = 10^{-20} \approx e^{-\frac{E_C}{k_BT}} \qquad\Rightarrow\qquad E_C \approx 50 k_BT \end{gather}$$
where $\Gamma_{\text{error}}$ is the rate of the error causing process. This means that for room temperature, T=300 K, the Coulomb energy E_Cshould be about 1 eV. Beside increasing the Coulomb energy to reduce the error rate, error detecting and correcting schemes can obviously further reduce bit errors.