4.3 ETCH3D -- Topography Simulator

Etching is used in various steps during the fabrication of an integrated circuit (IC). It is e.g. used to transfer the pattern comprising the design of the integrated circuit (IC) layout from the resist layer as it is created by lithography onto the Wafer. Another example of an etch step is to remove layers of material (e.g. masks) from the Wafer. Several techniques to simulate etching and deposition processes were developed in the past.

The etching simulator previously developed at the Institute for Microelectronics [70,71,72,73,74,75,76] is based on a cellular approach.

The etching simulation poses by far the strongest demands on the WAFER-STATE-SERVER library. It uses the I/O layer to read and to create a persistent Wafer. After the etching simulation is completed a complex post-processing step that extracts the geometry information from the etching front and merges it with the input Wafer is performed.