5.1.2.9 Validity of Compact Models

Since the computational effort for the numerical integration in TSU-ESAKI's formula or the evaluation of the quasi-bound states is numerically expensive, it is reasonable to ask if compact models can describe tunneling, at least for single-layer dielectrics. The compact tunneling models outlined in Section 3.7 are compared in Fig. 5.11 for a symmetrical metal-dielectric-metal structure (left) and for an nMOS structure with 3nm dielectric thickness (right). For the metal-dielectric-metal structure, SCHUEGRAF's model yields almost the same results as the computationally much more expensive TSU-ESAKI model. The FOWLER-NORDHEIM model delivers correct values only for high bias. It is thus only applicable to describe high-field transport through gate dielectrics, like program and erase cycles in EEPROM devices. For the MOS structure in the right part of Fig. 5.11, the SCHUEGRAF model fails to describe the tunneling current density at low bias. For high bias, however, it may be used to provide an estimation of the gate current. The FOWLER-NORDHEIM model totally fails for this application. Furthermore, the FOWLER-NORDHEIM model shows the minimum gate current at minimum electric field in the dielectric, and not for the minimum gate bias.

Figure 5.11: Compact models for a metal-dielectric-metal structure (left) and an nMOS structure (right, literature values from [249]).

A. Gehring: Simulation of Tunneling in Semiconductor Devices