7.3 Capacitance of General Interconnect Submicron Lines

So as to justify the need of accurate topography in general interconnect lines we extracted the capacitances of some nets of the layout presented in Figure 3.1 (corresponding to a 0.35$\mu m$ technology). As in Section 7.2.1, we compared the results when a simple planar solid model is assumed with those after three-dimensional topography simulation (with lithography taken into account).

We found that for the capacitances to the substrate (connected to ground) the variation is negligible, but for the inter-line capacitances it changed from 1% to a maximum of 31%. This difference is significant because the inter-line capacitance dominates over the capacitance to ground. Although we selected the nets more or less randomly (from the longer ones), the lines with higher differences are likely to occur because they correspond to those drawn side by side, that are commonly used in buses. The maximum variation obtained is almost identical to that from measured .