5.1  Stress in Thin Films of TSVs

Solid thin films are widely used in semiconductor technology as metal lines, barriers, glues, passivation layers as well as active materials for microelectromechanical systems (MEMS) [38]. TSVs have thin films implemented along the entire structure. In fact, in unfilled TSVs the via is made uniquely of very thin layers of multiple materials.

Thin films are usually defined as material layers with a thickness ranging from fractions of nanometers up to hundreds of micrometers. The small thickness gives the material a different behavior in comparison to its properties in bulk dimensions, especially regarding mechanical characteristics. Thin layers respond differently to stress and their fabrication generates internal forces which are high enough to potentially damage the TSV structure.

In semiconductor technology a film is usually attached to a substrate which can be hundreds of times thicker than the film itself, thereby limiting its deformation. In such a system (substrate-film) stress can generate due to various phenomena. In 1988, Doerner and Nix reviewed the main mechanisms for stress formation in thin films [86]. Freund summarized them in a comprehensive list [38], displayed in Table 5.1.

Table 5.1.: Stress sources identified by Doener and Nix.
Growth stress Extrinsic stress

Surface and/or interface stress Temperature change
Cluster coalescence Piezoelectric or electrostrictive response
Grain growth Electrostatic forces
Vacancy annihilation Gravitational or inertial forces
Grain boundary relaxation Compositional segregation
Shrinkage of grain boundary voids Electromigration
Incorporation of impurities Chemical reactions
Phase transformations and precipitation Stress induced phase transformations
Moisture adsorption or desorption Plastic or creep deformation
Structural damage (deposition process)  

Growth stress (residual stress) is understood by Freund as the stress which arises during film fabrication, and external stress (extrinsic stress) is any stress which is generated due to a force which originates after film deposition.

The list of stress sources is quite vast and it is impossible to include a comprehensive study of each item in this work. In addition, they are not all pertinent to the TSV technology. Hence, this work presents three different studies of relevant stress issues in TSVs related to thin films. The first is discussed in the following section and describes the manner in which the final build-up of intrinsic stress in the metal layer affects the mechanics of the TSV structure. The second topic is also discussed in this chapter and details how some external stress sources, such as thermal variation and wafer handling, can be dangerous for the vias. The last study demands a microstructural view of the thin film materials and must be handled differently; therefore it is left to the next chapter.