4.4.3 Triple-Gate FinFET

Due to the thick silicon nitride cap on the top of the fin the influence of the top gate can be neglected and the FinFET can be termed a double-gate device (see Fig. 4.21). If the silicon nitride cap is removed a third gate is formed at the top of the fin. This situation is shown in a vertical cut through the fin in Fig. 4.27(b) where Fig. 4.27(a) shows the conventional double-gate structure simulated before.

When the fin width $W_{\mathrm{fin}}$ is much larger than its height $T_{\mathrm{fin}}$ or the gate oxide at the top is much thinner than the gate oxides at the sidewalls the device can be treated as a single gate structure. Contrary, if $W_{\mathrm{fin}}$ is much thinner than $T_{\mathrm{fin}}$ or the top gate oxide is much thicker than the gate oxides at the sidewalls the FinFET has a double gate structure.

(a)  Double-gate FinFET.

(b)  Triple-gate FinFET.

Figure 4.27: Cut through the fin shown for a double-gate and a triple-gate FinFET.

Figure 4.28: Electron current density inside the channel shown for a double-gate and a triple-gate FinFET.

(a)  Electron current density of the double-gate FinFET. $V_{{\mathrm{DS}}}=1.5\,{\mathrm{V}}$.

(b)  Electron current density of the triple-gate FinFET. $V_{{\mathrm{DS}}}=1.5\,{\mathrm{V}}$.

Fig. 4.28(a) and Fig. 4.28(b) show the vector component of the electron current density perpendicular to the cut for the double- and the triple-gate FinFET, respectively. One can clearly see the formation of the third channel on the top of the fin. Fig. 4.29 shows a three-dimensional view of the fin. A higher current density appears at the edges due to corner effects.

Figure 4.29: Contour lines of the electron current density $[\textrm {A}/\textrm {cm}^2]$ in the channel area of a triple-gate FinFET at $V_{{\textrm {GS}}} = V_{{\textrm {DS}}} = 1.5{\hspace {.35ex}}{\textrm {V}}$.

A comparison of the $I_{\mathrm{D}}$- $V_{\mathrm{DS}}$ characteristics of the double-gate and the triple-gate FinFET is shown in Fig. 4.30. The figure shows a small increasment of the drive current due to the third gate.

Figure 4.30: Result of a three-dimensional simulation of a double-gate and a triple-gate FinFET. $V_{th}=-0.13{\hspace {.35ex}}{\textrm {V}}$.