So far, only a very limited number of mainly experimentally driven studies have focused on several aspects of the manifold mutual influences and reactions of the various defect types in full {\(V_\mathrm {G},V_\mathrm {D}\)} bias space. In addition to the above mentioned investigations using single oxde traps, studies conducted on large–area devices [MJJ6, 300, MJJ4, 301–306, MJJ2, 307] further support the derived conclusions. They highlight two distinct features in the degradation and recovery characteristics for mixed–mode stress conditions. First, a drift minimum for increasing \(\Vd \) and fixed \(\Vg \) is observed, which depends on the applied gate voltage [MJJ6, 300, 302, MJJ2, 307]. Such a minimum was found to be at \(\Vd \ll \Vdd \), which is often referred to as inhomogeneous BTI in the literature, and attributed to an inhomogeneous, decreasing, oxide field Fox across the interface [301]. Second, it was shown that the recoverable component \(R\) of degradation reduces disproportionately with increasing \(\Vd \) [MJJ6, 300–303, MJJ2], where \(R\) is almost completely absent for severe drain bias (\(\Vd \gg \Vdd \), HCD regime), and that the recovery rate after pure BTI stress (\(\Vd =\SI {0}{V}\)) is greater compared to mixed–mode conditions (\(\Vd \neq \SI {0}{V}\)), i.e. the defects’ emission times are shifted to longer times [300–302]. However, such rather intricate details can not be captured with simple electrostatic reasoning, where only the lateral dependence of Fox is taken into account. On the other hand, the aforementioned results suggest that the source side of the channel is also affected by severe mixed–mode/HCD stress conditions. Furthermore, the distribution of accessible defects in the oxide, which actively participate in the degradation and recovery characteristics of the device, also changes with an applied drain bias. A series of recent publication reported by imec [308, 309, MJJ9, 310, 311] complements the above findings. Extended studies on n– and p–FETs employing high–\(\kappa \) gate stacks in full {\(V_\mathrm {G},V_\mathrm {D}\)} bias space show that non–equilibrium dynamics such as II are a crucial component for the understanding of the damage caused in certain bias space regions, particularly in the off–state stress regime where opposite polarity trapping dominates the degradation due to the available defect bands in SiO\(_2\) and HfO\(_2\). In addition, the degradation and recovery maps in full bias space clearly show that the two main degradation modes – charging of oxide defects due to BTI and the activation of interface traps caused by HCD – concurrently occur and indicate a possible interplay between the different defect types.
The incredible variety of experimental results showing peculiarities of mixed–mode BTI/HCD effects and the implications on the different types of defects facilitate a broad spectrum of explanations which range from macroscopic to microscopic considerations. A unified modeling approach which takes into account the multitude of effects associated with the various stress conditions in full {\(V_\mathrm {G},V_\mathrm {D}\)} bias space – from electrostatic changes in the device to an appropriate description of carrier transport to atomistic reactions – is therefore beyond the scope of this work.
The present Section aims at a physical description of the phenomena in full {\(V_\mathrm {G},V_\mathrm {D}\)} bias space as was shown in [MJJ2]. This ultimately involves the superposition of two reliability models due to the simultaneous occurrence of two phenomena: Charging of oxide defects due to BTI and the creation of interface defects triggered by energetic carriers, known as HCD. The developed methodologies are applied to capture the degradation and recovery characteristics of large–area pMOSFETs over a wide range {\(V_\mathrm {G},V_\mathrm {D}\)} stress conditions.
Large–area variants (\(W=\SI {10}{\micro m}\)) of the pMOSFET devices already used above, see Sec. 5.2, have been investigated to elucidate the behaviour of a collective ensemble of defects in the oxide. To obtain complete degradation maps, the devices were characterized over a broad range of {\(V_\mathrm {G},V_\mathrm {D}\)} bias space, larger than the operating condition \(\Vdd \). The experiments are based on an extended Measure–Stress–Measure (eMSM) [312] technique where the threshold voltage has been extracted using an ultra–fast setup with a delay after stress of \(10^{6}\mathrm {s}\). Additionally, after \(\SI {10}{ks}\) of stress time, an individual bias point corresponding to \(I_\mathrm {D,lin}\) has been evaluated to quantify its degradation. All measurements have been performed at a temperature of \(T=\SI {398}{K}\), unless explicitly stated otherwise. Further experimental details can be found in [MJC15, MJJ6, 300].
A first and essential step towards understanding and modeling the processes responsible for the created damage in each region of the bias map, the models involved need to be calibrated. In order to ensure well calibrated model parameters possessing predictive quality, the respective worst–case conditions for each degradation mode have been chosen, namely \(\Vg >\Vdd \), \(\Vd =\SI {0}{V}\) for BTI and \(\Vg \sim 0.5\Vd \) for HCD.
The effect of BTI and the mechanisms responsible for charge (de–) trapping in oxide defects has been modeled using the equilibrium 4–state NMP model described in Sec. 2.2. As shown in Fig. 5.13 (left panels) the model is able to accurately describe the experimental data sets for a broad range of gate stress conditions \(\Vg \) and stress times \(t_\mathrm {s}\). The extracted NMP parameter set, see Sec. 2.2.2, is in full agreement with previous reports, particularly the frequently reported defect band in SiON of about \(\SI {0.8}{eV}\) below the silicon valence band (VB), and summarized in Table 5.2.
Parameter 
\(\mu \) 
\(\sigma \) 

\(E_\mathrm {1}\) 
trap level in (stable) state 1 
\(\SI {0.83}{eV}\) 
\(\SI {0.33}{eV}\) 
\(E_\mathrm {1'}\) 
trap level in (metastable) state 1\(^\prime \) 
\(\SI {0.52}{eV}\) 
\(\SI {0.42}{eV}\) 
\(E_\mathrm {2'}\) 
trap level in (metastable) state 2\(^\prime \) 
\(\SI {0.43}{eV}\) 
\(\SI {0.37}{eV}\) 
\(R_\mathrm {12'}\) 
squared curvature ratio of 1 and 2\(^\prime \) 
\(\SI {1.1}{}\) 
\(\SI {0.48}{}\) 
\(R_\mathrm {1'2}\) 
squared curvature ratio of 1\(^\prime \) and 2 
\(\SI {0.84}{}\) 
\(\SI {0.48}{}\) 
\(S_\mathrm {12'}\) 
relaxation energy from 2\(^\prime \rightarrow 1\) 
\(\SI {2.74}{eV}\) 
\(\SI {0.81}{eV}\) 
\(S_\mathrm {1'2}\) 
relaxation energy from 2\(\rightarrow 1^\prime \) 
\(\SI {1.68}{eV}\) 
\(\SI {0.79}{eV}\) 
\(\epsilon _\mathrm {11'}\) 
activation energy from 1\(\rightarrow 1^\prime \) 
\(\SI {0.43}{eV}\) 
\(\SI {0.32}{eV}\) 
\(\epsilon _\mathrm {22'}\) 
activation energy from 2\(\rightarrow 2^\prime \) 
\(\SI {1.16}{eV}\) 
\(\SI {0.36}{eV}\) 
On the other hand, describing HCD and the creation of interface defects due to the interaction of energetic carriers with interfacial Si–H bonds is based on the physical framework of resonance scattering developed in Chapter 4.1. Due to the large number of bias points included within the following study, the harmonic model for HCD, see 4.1.7, has been used here. The calibrated parameter set is already given in Sec. 5.1. 5.13 (right panel) shows good agreement between simulation and experimental degradation traces which demonstrates the quality of the model. Note that calculated interface defect density has been considered in the simulations using a donor state \(\SI {0.21}{eV}\) above the silicon valence band with a Gaussian distribution of \(\SI {0.18}{eV}\)^{3}.
^{3} Although interface defects possess an amphoteric character, their acceptor state in the upper half of the band gap can be neglected within the simulations.
The experimentally obtained degradation and recovery maps in full {\(V_\mathrm {G},V_\mathrm {D}\)} bias space are shown in Fig. 5.14. The maximum threshold voltage drift \(V_\mathrm {th,max}^\mathrm {deg}\) is extracted as the first measurement point in the recovery traces with respect to the pristine threshold voltage of the device, whereas the amount of recovery \(V_\mathrm {th,max}^\mathrm {rec}\) is defined as the change of the drift after a subsequent \(\SI {10}{ks}\) recovery phase. The degradation map shows a strong degradation in the mixed–mode as well as in the HCD regime with \(V_\mathrm {th,max}^\mathrm {deg}\) values (\(\sim \SI {150}{mV}\)) that are three times larger than for the BTI mode (\(\sim \SI {50}{mV}\)). Additionally, the data reveal that the transition region, from the HCD mode to the mixed–mode regime, is very sensitive to the applied gate bias \(\Vg \), which is particularly pronounced for \(\Vd =\SI {2.8}{V}\), see Fig. 5.14. The recovery behaviour on the other hand, shows that almost \(70\%\) of the degradation within the BTI stress regime recovers within \(\SI {10}{ks}\). Towards mixed–mode stress conditions one can observe a strong decreasing trend with finally less than \(10\%\) of the created damage being recovered. In the case of pure HCD, which is attributed to a more permanent degradation showing annealing effects only at elevated temperatures, see [221, 248], the recoverable component is almost completely absent. Only \(2\%\) of the \(\Delta V_\mathrm {th}\) drift recovers within \(\SI {10}{ks}\) which can be considered negligible.
In total 63 simulations have been performed in order to assess the behaviour of BTI, HCD and its interplay in full bias space, see Fig 5.15. As was shown in [MJJ4, MJJ2], carrier energy distribution functions (EDFs) not only play an important role for modeling HCD, see Chapters 2 and 4, but also to adequately capture the intricate non–equilibrium dynamics of oxide defects, see Sec. 5.2.1. Due to the computational effort of the NMP\(_\mathrm {neq.}\) model, here the more practical implementation of the full bias space TCAD model for BTI, NMP\(_\mathrm {\mathbf {eq.+II.}}\) (see Sec. 4.2.1) is used. Its reduced complexity is more suited for the simulations of a large number of defects typically comprised in large–area devices, since the non–equilibrium EDFs are not considered within this model variant. Instead, the utilized impact ionization (II) model [313] within the DD setup ensures that hole and electron II rates are reasonably well represented and thus provides a suitably accurate description of the defects’ interaction with the VB and CB. A detailed motivation and validation of this approach is given below, see Sec. 5.3.3.
Simulation results for all {\(V_\mathrm {G},V_\mathrm {D}\)} bias conditions are summarized in Fig. 5.15. The degradation map is in very good agreement with the experimental data, matching the measured trends well in the (non–uniform) BTI regime and also towards the transitions to HCD and mixed–mode conditions. Moreover, also the recovery behaviour is properly represented using the NMP\(_\mathrm {eq.+II}\) model, particularly the strong decrease along increasing drain bias conditions.
Increasing \(\Vd \) stress enhances the effect of II and the creation of secondary generated carriers along the channel. Defects in the oxide (potentially) interact with the electrons in the CB which typically accelerates their discharging dynamics, see Sec. 5.2.1. This effect also perturbs trap characteristics in the source and channel region of the device, see Fig. 5.16, which shows a comparison of the NMP\(_\mathrm {eq.}\) and NMP\(_\mathrm {eq.+II}\) model for a large ensemble of spatially distributed defects across the oxide. One can clearly see that for \(\Vg =\Vd =\SI {2.8}{V}\) the reduction of charged defects is enhanced using the NMP\(_\mathrm {eq.+II}\) model variant: Less defects are charged within the channel region of the device which leads to a decreasing contribution of BTI as well as a reduction of the recoverable component. Such considerations are beyond electrostatic approximations which would overestimate the contribution of BTI during stress and recovery. Furthermore, note that this decreasing trend seems to be universally valid across the {\(V_\mathrm {G},V_\mathrm {D}\)} recovery map, see Figs. 5.14 and 5.15, and in detail in Fig. 5.17 which shows one–dimensional cuts along increasing \(\Vg \) and \(\Vd \) bias conditions.
On the other hand, the degradation characteristics across full bias space follows a more complicated behaviour, see Figs. 5.17 and 5.18. Horizontal cuts (at a fixed \(\Vg \)) are intuitive to understand: The total degradation in the non–uniform BTI regime initially reduces, mainly due to the decreasing oxide field Fox along the interface and thus the amount of charged traps. However, this trend is subsequently reversed for higher drain biases towards mixed–mode conditions due to the onset of HCD and the additional damage caused by the creation of interface defects. Fig. 5.18 shows the full \(I_\mathrm {D}V_\mathrm {G}\) curves along the cut. Note that, while oxide defects tend to only shift the curves, interface traps additionally severely affect the mobility, therefore, also degrade the sub–threshold slope.
While the overall agreement between measurement and simulations characteristics is very good, one feature is not properly captured: The degradation minima visible in the non–uniform BTI regime are shifted towards higher \(\Vd \) conditions within the simulations compared to the experimentally extracted values. This leads to an underestimated degradation around \(\Vd =\Vdd \), which is particularly pronounced for \(\Vg =\SI {2.8}{V}\). At the same time, however, the recoverable component, which is only attributed to discharging of oxide defects, is well represented by the model approach, see Fig. 5.17.
Vertical cuts along constant \(\Vd \) conditions reveal a more complex behaviour, particularly for \(\Vd =\SI {2.8}{V}\). Initially, the total degradation increases towards the worst–case HCD stress bias (\(\Vg =\SI {1.5}{V},\,\Vd =\SI {2.8}{V}\)), then, however, significantly drops and subsequently the collective degradation increases again towards \(\Vg =\Vd =\SI {2.8}{V}\), eventually causing a threshold voltage shift close to the \(\Delta V_\mathrm {th,max}\) at the overall worst–case conditions of the HCD regime. Note that such a feature is not clearly visible for reduced \(\Vg \) bias conditions. Not surprisingly, the simulations show that the damage along these cuts is mainly governed by HCD and the creation of interface defects, while charged oxide traps only play a minor role at severe mixed–mode stress. Assuming that recovery is only due to oxide defects, this is also visible in the recovery traces, see Fig. 5.17. This trend, however, can be fully understood by considering the corresponding EDFs, though a self–consistent solution of the bipolar BTE is mandatory for a proper understanding. Fig. 5.19 shows isolines of the corresponding hole (EDF\(_\mathrm {p}\)) and electron (EDF\(_\mathrm {e}\)) EDFs along the Si/SiO\(_2\) interface at \(\SI {1}{eV}\) and \(\SI {2}{eV}\), respectively for the cuts with \(\Vg =\SI {2.8}{V}\) (left) and \(\Vd =\SI {2.8}{V}\) (right). Quite as expected, for fixed \(\Vg \) and increasing \(\Vd \) a higher concentration of hot holes is visible at the drain side which eventually trigger the effect of impact ionization (II) and cause a substantial accumulation of (energetic) electrons at the source end of the channel.
This effect has two implications. First, an acceleration and propagation of hot–carrier induced damage along the channel due to secondary generated hot electrons. Second, possibly modified discharging dynamics of oxide defects due to the interaction with electrons in the CB, which is covered within the NMP\(_\mathrm {eq.+II}\) model. The cut along fixed \(\Vd =\SI {2.8}{V}\), on the other hand, discloses a more intricate \(\Vg \) dependence. For increasing \(\Vg \) up to \(\SI {1.5}{V}\) the impact ionization rate monotonously increases which is reflected in an increasing concentration of electrons with a substantial energy along the channel. Therefore, the damage in the HCD regime, particularly at the worst–case stress conditions (\(\Vg =\SI {1.5}{V},\,\Vd =\SI {2.8}{V}\), corresponds to \(I_\mathrm {sub,max}\)), is equally caused by energetic holes and electrons and distributed along the whole channel. Increasing \(\Vg \) further indeed enhances the energy of holes at the drain side; however, it actually reduces the electronic energies along the channel towards the source side, see Fig. 5.19. This leads to a reduction of the interface state density in the respective regions. Since the density of interface states in the drain region is already saturated, the overall degradation reduces, starting from \(\Vg =\SI {1.5}{V}\). Only at severe mixed–mode stress bias this trend is reversed and electrons again gained more energy. Likewise, the threshold voltage drift \(\Delta V_\mathrm {th}\) again increased to a value similar to the worst–case conditions, see Fig. 5.17.
Traditionally, studies related to hot–carrier induced damage analyze the degradation of the linear or saturation drain current, \(\Delta I_\mathrm {D,lin}\) or \(\Delta I_\mathrm {D,sat}\). However, the corresponding bias conditions would impose an additional stress during the recovery sequence and adversely affect the measurement results. Nevertheless, a single bias point associated with \(I_\mathrm {D,lin}\) has been measured after \(\SI {10}{ks}\) of stress. The measurement versus simulation results are shown in Fig. 5.20. Qualitatively, the behaviour is similar to the \(\Delta V_\mathrm {th}\) shifts shown above. While the simulations again agree very well with the experimental data in the highly damaged regions, the agreement deteriorates in the (non–uniform) BTI regime. The measurement data show a notable degradation of the linear drain current also in the BTI region as well as a degradation minimum around \(\Vd =\SI {1.2}{V}\), which is shifted towards higher \(\Vd \) values compared to the drift minimum position of \(\Delta V_\mathrm {th}\), see Fig. 5.14. On the contrary, the simulations predict a rather constant \(I_\mathrm {D,lin}\) degradation in this regime(s) with no clear minimum visible. A possible explanation for this discrepancy could be the widely accepted assumption that BTI indeed creates defects at the Si/SiO\(_2\) interface [1, 12, 16]. However, due to the empirical modeling approach used to account for this effect it has not been considered here. The creation of interface defects has been exclusively modeled using the (harmonic) HCD model which, however, predicts a vanishing contribution due to the equilibrium carrier EDFs within the BTI regime.
The presented results, see [MJJ2], and analysis clearly show that device degradation in full {\(V_\mathrm {G},V_\mathrm {D}\)} bias space can only be modeled and understood by performing thorough transport simulations and using proper modeling frameworks which take the fundamental physics into account.
In order to be confident that the results presented above truly represents the dynamics of oxide defects under an applied drain bias, the assumptions of the NMP\(_\mathrm {eq.+II}\) need to be verified against the computationally most expensive full model variant NMP\(_\mathrm {neq.}\). Fig. 5.21 shows the results for a large ensemble of defects contained in the large area pMOSFETs simulated with all three different model variants and two stress conditions, namely \(\Vg =\SI {2.8}{V}\) and \(\Vd =\SI {1.5}{V}\) (upper pannels) and \(\Vd =\SI {2.8}{V}\) (lower panels). One can clearly see that the NMP\(_\mathrm {eq.}\) model overestimates the degradation, and hence, the recovery due to oxide defects. The other two approaches, NMP\(_\mathrm {eq.+II}\) and NMP\(_\mathrm {neq.}\), yield similar and consistent results with only minor differences visible in the stress and recovery characteristics. These subtle differences arise due to non–equilibrium EDFs and the heated carrier ensemble which is considered in the NMP\(_\mathrm {neq.}\) model.
To gain a detailed understanding of how exactly heated carriers and the non–equilibrium EDFs influence the degradation and recovery dynamics of large area MOSFETs, the defect distribution needs to be looked at in more depth. Fig. 5.22 shows simulation snapshots for \(\Vg =\Vd =\SI {2.8}{V}\) after \(\SI {10}{ks}\) of stress calculated with the NMP\(_\mathrm {eq.}\) and the NMP\(_\mathrm {neq.}\) model variant compared to results for pure BTI conditions at \(\Vd =\SI {0.0}{V}\). Clearly visible is the uniform distribution of the charge density along the Si/SiO\(_2\) interface (upper panel) for defects above the Fermi level of the device (lower panel). Increasing the drain bias illustrates the well known effect of a non–uniform oxide field Fox which shifts the trap levels below \(E_\mathrm {F}\), particularly at the drain side, where they remain neutral. Taking the non–equilibrium EDFs into account reveals that fewer defects in the channel (and partly at the source side) are able to capture a charge, thereby reducing the total amount of degradation and recovery. On the other hand, defects located in the vicinity of the drain end potentially interact with the heated carrier ensemble and become charged, even though their effective trap level is well below \(E_\mathrm {F}\). Within the simulations, however, only around \(\sim 2\%\) of the active defects exhibit an increased occupancy proportional to the drain voltage \(\Vd \). The measurement data presented in [295] further support this finding.
To conclude, the presented simulation benchmark supports the validity of the extended model NMP\(_\mathrm {eq.+II}\) and indicates that the impact of an increased drain bias onto oxide defects is mainly due to the interaction with secondary generated carriers by II.