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4.2 Experimental Characterization

The fact that it is assumed to be highly unlikely to measure discrete steps in the $\Delta V_{\mathrm {th}}$ traces caused by individual defects leads to the assumption that maybe other processes are responsible for the observed discrete steps. For further conclusions, the temperature and bias dependences of the characteristic times of the RTN signal in Figure 4.1 were obtained. Therefore, pMOSFETs mounted on ceramic packages were measured since in such an experimental setup contacting issues are minimized.

The experimental characterization of the steps in large-area devices appeared to be quite complicated. Most of the observed step heights are smaller than 0.5 mV, which is very close to the resolution limit of the setup. As soon as the noise amplitude of the signal increases slightly due to, e.g., previously applied stress or elevated temperatures the steps cannot be extracted from the trace anymore. Therefore, statistics cannot be captured with such a small sample set. Nevertheless, a large-area device RTN signal could be characterized, shown in Figure 4.1.

In this figure at least three RTN signals can be seen. The signal with the largest step height, $d$   $\approx$  0.2 mV, was characterized since the others were not accurately detectable over different temperatures and gate bias conditions. The results of this analysis is shown in Figure 4.2. The mean values of $\tau _{\mathrm {c}}$ and $\tau _{\mathrm {e}}$ were obtained according to Equations 3.9 and 3.10, respectively. It is quite remarkable that $\tau _{\mathrm {c}}$ $($ $V_\mathrm {G}$ $)$ and $\tau _{\mathrm {e}}$ $($ $V_\mathrm {G}$ $)$ behave similarly to the $\tau _{\mathrm {c}}$ $($ $V_\mathrm {G}$ $)$ and $\tau _{\mathrm {e}}$ $($ $V_\mathrm {G}$ $)$ of an individual defect in a nano-scale device (see Subsection 2.1.3): With increasing $|$ $V_\mathrm {G}$ $|$ , $\tau _{\mathrm {c}}$ decreases and $\tau _{\mathrm {e}}$ increases and both decrease with increasing temperature.

Figure 4.2: **Characteristic capture and emission times obtained from the RTN analysis:** $\tau _{\mathrm {c}}$ and $\tau _{\mathrm {e}}$ behave similarly to an individual defect in a nano-scale device. With increasing $|$ $V_\mathrm {G}$ $|$ $\tau _{\mathrm {c}}$ decreases and $\tau _{\mathrm {e}}$ increases. Both decrease with in- creasing temperature.

$ \tau _{\mathrm {c}} $ — Figure 4.2: **Characteristic capture and emission times obtained from the RTN analysis:** $\tau _{\mathrm {c}}$ and $\tau _{\mathrm {e}}$ behave similarly to an individual defect in a nano-scale device. With increasing $|$ $V_\mathrm {G}$ $|$ $\tau _{\mathrm {c}}$ decreases and $\tau _{\mathrm {e}}$ increases. Both decrease with in- creasing temperature.

Unfortunately, as mentioned previously, a thorough analysis of the “defect" parameters with the TDDS framework was not possible. As soon as a stress bias was applied the discrete steps could not be resolved anymore. This results in a too small data set in a too narrow gate bias region to check whether the four state NMP model can explain the observed behavior in order to make conclusions on the properties of such a “defect" in large-area devices. Nevertheless, a few thoughts which might be useful for a future work on this topic are summarized in the following.

• The large-area devices showing discrete steps in their $\Delta V_{\mathrm {th}}$ traces in the shown measurements have a small ratio $L$ / $W$ . They are quite short but very wide. So far, the dependence of the step height distribution on the channel area or on $L$ and $W$ independently from each other have been made [18, 56]. However, any study on the dependence of the exponential step height distribution on the $L$ / $W$ ratio has been found – especially for very small ratios. Thus, the empirically found exponential step height distribution might have a different shape for different $L$ / $W$ ratios. In other contexts, e.g., the degradation and recovery of the device-to-device variability, it has been discussed that the edge area might play a role for experimental characterization [123]. This is because, the oxide in the outer regions (edge area) grows less homogeneously than in the middle of the active area during fabrication. Therefore, relative to the active area of the oxide, the edge area is larger in narrow long channel devices than in short wide channel devices. Although the edge area is not the reason for the discrete steps in the measurements, it shows that $L$ / $W$ ratio related effects might have an impact on the step height distribution.
• The discrete steps in large-area devices were always measured in the subthreshold region. In this regime, the conductive channel is not completely formed. Thus, similar to the percolation path in nano-scale devices shown in Figure 1.4, the current flow is not uniformly distributed over the width and single defects might have a similar impact on $I_\mathrm {D}$ as shown for nano-scale devices.
• Possible causes for the steps in large-area devices might be capture and emission events of not a single defect but of a cluster of defects. If, for example, the capture and emission events of several defects are coupled and they capture and emit charge carriers simultaneously, the step height in the $\Delta V_{\mathrm {th}}$ trace would be of course larger than step heights caused by single defects. With this idea, several questions arise, like if and how such clusters can form, if and how the capture and emission events can be coupled and many more.

In order to obtain the cause of discrete steps in large-area devices, a thorough experimental analysis is required. The analysis remains an open issue for future works.

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