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List of Figures

1.1 Lateral planar MOSFET used in CMOS technology: The cross section of a pMOSFET is shown in the left panel. Two highly p-doped source and drain regions separated by an n-doped body region (e.g. Si) and an insulating layer (e.g. silicon oxynitride $\ch{SiON}$ ) separating the gate contact from the body. The right panel shows a circuit schematics of a CMOS inverter, which is a widly used application of MOSFETs in digital circuits.

1.2 The energy band diagrams for an ideal MOSFET capacitor: Under different bias conditions the MOSFET can be driven from accumulation (left) to inversion (right). Top: nMOSFET Bottom: pMOSFET

1.3 Typical transfer characteristics of an nMOSFET: Drain current $I_\mathrm {D}$ plotted against gate voltage $V_\mathrm {G}$ on a log-lin (red, left scale) and a lin-lin (blue, right scale) scale. Off-current (current flowing when MOSFET is switched off), subthreshold slope (slope of the subthreshold region in a log-lin plot), threshold voltage ( $I_\mathrm {D}$ where the inversion layer is formed) and on-current (current flowing in the on-state) are the most important parameters characterizing the $I_\mathrm {D}$ - $V_\mathrm {G}$ .

1.4 Percolation path: A single percolation path formed by random discrete dopants (current flow shown in the uppermost layer) and contours of constant potential in a pMOSFET: Left: current flow without a disturbance due to charge exchange events caused by oxide defects. Center: reduced current flow when a defect located beside the percolation path traps a charge carrier. Right: disturbance of the current flow when a defect located directly in the center of the percolation path traps a charge carrier. [3]

1.5 Schematic transfer characteristics of a pMOSFET for the three cases shown in Figure 1.4. The more the current flow is disturbed by a trapped charge carrier, the more $V_{\mathrm {th}}$ shifts, the subthreshold slope decreases and the on-current reduces.

1.6 Two defect types in MOSFETs: Defects can be defined as deviations within the short-range order of the atomic structure. Interface defects occur due to dangling bonds at the interface between the crystalline substrate and the amorphous oxide. Oxide defects can be either vacancies, e.g., the oxygen vacancy, or bridging atoms, e.g., the $\ch{H}$ bridge, hydroxyl- $\mathrm {E}^\prime$ center.

2.1 Transfer characteristics and transconductance of a large-area pMOSFET after NBTI stress: The $I_\mathrm {D}$ - $V_\mathrm {G}$ (top) is recorded in the linear region for $V_\mathrm {D}$   $=$  −0.1 V and the transconductance is extracted (bottom). After 1 ks of NBTI stress, the $V_{\mathrm {th}}$ is shifted and $I_\mathrm {D,lin}$ as well as $g_\mathrm {m,max}$ are reduced.

2.2 Shift of the threshold voltage during stress and recovery: $\Delta V_{\mathrm {th}}$ during stress and recovery of a FinFET is shown. During stress $\Delta V_{\mathrm {th}}$ increases and decreases again as soon as the stress bias is removed. Figure source: [31].

2.3 Shift of the threshold voltage under NBTI and PBTI stress: Both BTI classifications for $\ch{SiO2}$ nMOSFET and pMOSFET. NBTI stress conditions with $V_\mathrm {G}$ $<0$  V have the greatest impact on pMOSFET. Figure source: [32].

2.4 Bias dependence of the threshold voltage shift over time: measured on a large-area SiON pMOSFET with $L$ and $W$ in the range of µm during (a) stress for different $V_{\mathrm {G}}^\mathrm {str}$ and (b) during recovery after the same $V_{\mathrm {G}}^\mathrm {str}$ at different $V_{\mathrm {G}}^\mathrm {rec}$ . Figure source: [33], smoothed.

2.5 Temperature dependence of degradation at the same stress bias: $T$ accelerates the degradation of $\Delta V_{\mathrm {th}}$ , which is shown here for a FinFET at three different temperatures (open and closed symbols; two similarly processed wafers). The data is described by a power-law dependence. Figure source: [31].

2.6 Schematic illustration of the classical reaction-diffusion model of NBTI: $\ch{Si}$ - $\ch{H}$ bonds at the interface between the substrate and the oxide are broken during NBTI stress. Neutral $\ch{H}$ , expressed by the $\ch{H}$ density $H(x,t)$ , diffuses into the oxide and leaves behind positively charged interface states. $\ch{H}$ diffusion proceeds via shallow hopping sites in the oxide shown as a regular network of potential wells. Figure source: [31].

2.7 Recovery traces of a nano-scale pMOSFET and the spectral map: Two $\Delta V_{\mathrm {th}}$ recovery traces of a pMOSFET. Top: Recovery proceeds step-wise due to emission events of single defects in the oxide. The symbols mark the extracted emission times and step heights which are nearly unambiguous fingerprints of each defect. Bottom: The step heights and the emission time build the spectral map. Figure source: [41].

2.8 Step height distribution of individual defects: (a) Typical NBTI recovery traces in nano-scale devices. Each step corresponds to a single gate oxide defect discharge event. (b) The $\Delta V_{\mathrm {th}}$ step heights plotted on CCDF plot. The step heights appear exponentially distributed. Figure source: [18].

2.9 Bias dependence of the capture and emission time: Three defects enumerated with 1, 2 and 3 in an $\ch{SiON}$ pMOSFET with $L$ and $W$ in the range of 100 nm are characterized during (a) stress for different $V_{\mathrm {G}}^\mathrm {str}$ and (b) during recovery after the same $V_{\mathrm {G}}^\mathrm {str}$ at different $V_{\mathrm {G}}^\mathrm {rec}$ . Similar to the the measurements in large-area devices (Figure 2.4) the over all $\Delta V_{\mathrm {th}}$ of nano-scale MOSFETs depends on $V_\mathrm {G}$ . Figure source: [33].

2.10 Temperature dependence of the characteristic emission times: Temperature accelerates degradation and recovery. Figure source: [33].

2.11 A capture/emission time: The CET map is obtained by a variation of $V_{\mathrm {G}}^\mathrm {str}$ and $V_{\mathrm {G}}^\mathrm {rec}$ at NBTI conditions (left). The solid lines are obtained by integrating the CET map following and the dashed lines are the permanent component not visible in the CET map (right). The CET map summarizes the particular $\tau _{\mathrm {e}}$ $($ $V_\mathrm {G}$ $)$ and $\tau _{\mathrm {c}}$ $($ $V_\mathrm {G}$ $)$ behavior of many defects. Figure source: [16].

2.12 Two-state model: an RTN signal can be modeled using a two-state Markov model.

2.13 Configuration coordinate diagram for a two-state model using a non-radiative multiphonon theory: The transition from $i$ to $j$ proceeds either radiatively or non-radiatively. In typical semiconductor devices, the radiative transition can be excluded as no photons are available during the regular operation. Therefore, the energy needed to overcome the difference between the minimum point and the crossing point of the parabolas hasto be supplied by phonons. Figure source: [58].

2.14 The field-dependence of the NMP transition: As a consequence of the electrostatic shift of the defect level, the relative position of the parabolas change. Figure source: [16].

2.15 Region of defects actively contributing to the degradation and recovery in an NBTI setting: Defects whose energy levels are located in the AER are neutral prior stress, can be potentially charged during stress and discharged again during recovery. Furthermore, the defect energy band is chosen in such a way that the contribution of defects located in right half of the oxide dominates the degradation. Figure source: [16].

2.16 Switching and fixed oxide defects: TDDS data of a fixed positive charge trap (left) and a switching trap (right). Figure source: [61].

2.17 Interrupted RTN: After NBTI stress the defect produces RTN for a limited amount of time and is then neutral. Figure source: [16].

2.18 Four-state diagram: The four-state NMP model consists of two stable ( $1$ and $2$ ), two metastable states ( $1^\prime$ and $2^\prime$ ), two neutral ( $1$ and $1^\prime$ ) and two charged ( $2$ and $2^\prime$ ) states.

2.19 Configuration coordinate diagram for a four-state model using a non-radiative multiphonon theory: Schematic cross-section of the potential energy surface of the four-state NMP model. The energy parameters needed for calculating all transition rates are shown. Figure source: [65].

2.20 Possible defect candidates: Atomic configurations corresponding to the states $1$ , $1’$ , $2’$ and $2$ for three possible oxide defects [65]. Top: Oxygen vacancy. Center: Hydrogen bridge. Bottom: Hydroxyl- $\mathrm {E}^\prime$ center. H atoms are shown as silver, Si atoms are yellow and O atoms are red. The blue bubbles represent the localized highest occupied orbitals for the neutral charge states and the lowest unoccupied orbital for the positive charge states. Figure source: [65].

2.21 Defect volatility in spectral maps: Defects can dis- and reappear in TDDS measurements. Here this is shown based on spectral maps of different measurements on the same nano-scale device. Figure source: [33, 69].

2.22 Monitoring of volatile defects over three months: The shown defects A7, A8 and A9 can be both, active and inactive. Figure source: [65].

2.23 Example of the potential energy surface of a hydroxyl- $\mathrm {E}^\prime$ center including volatile states: The defect can become volatile starting from a positive charge state, which is one of the four (active) NMP states. As soon as it overcomes the barrier $\mathrm {E}_\mathrm {B}$ it is inactive and not visible in measurements. Figure source: [65].

2.24 Schematic Hydrogen release mechanism: At the gate side a proton is trapped. During stress, the trap level can be shifted below the Fermi level, which makes it possible for the proton to be neutralized. This neutrally charged hydrogen atom can now be released by overcoming a barrier and move towards the channel side. The empty trap site can potentially be refilled by $\ch{H}$ released from the gate. This process should be strongly temperature dependent. Figure source: [74].

2.25 One dimensional schematic of the H-release model: The oxide of a MOSFET consists of potential trapping sites for hydrogen. Hydrogen can either occur in a neutral interstitial position (grey) or as a trapped neutral configuration $H^\mathrm {0}$ (blue) or in a trapped positive configuration $H^+$ (red). The gate side acts as an additional hydrogen reservoir. Due to the high diffusivity of hydrogen the exchange to a new trapping site can ocur very fast and is therefore not rate limiting. Figure source: [74].

2.26 Extended four-state NMP model: Illustrated for a promising defect candidate, the hydroxyl- $\mathrm {E}^\prime$ center. Still, the core of this model (middle) is build around the bistable defect with four states ( $1$ , $1^\prime$ , $2$ , $2^\prime$ ) and describes the active defect, which is capable of capturing and emitting charge carriers. However, the extended variant of the model also accounts for the inactive phases of the defect via transitions to the precursor states $0$ and $0^2$ (left) and the inactive states $0^{\tmspace -\thinmuskip {.1667em}+}$ and $0^{\mathrm {n}}$ (right).

2.27 Dissociation of the Si-H bond: A schematic presentation of hot-carrier degradation. The dissociation of the Si-H bond induced by the successive bombardment of two hot carriers is sketched in the right part. Figure source: [23].

2.28 Single-particle and multiple-particle mechanism: A schematic representation of the SP- and MP-mechanisms. According to the SP-process a solitary energetical carrier can dissociate the bond. The MP-mechanism corresponds to the subsequent bombardment of the the bond by several colder carriers followed by the bond excitation and eventually the H release. Figure source: [23].

2.29 The Si–H bond as a truncated oscillator: The depassivation and passivation processes are highlighted. Figure source: [93].

2.30 Evolution of lateral trap density distribution with stress time: $N_\mathrm {it}$ and $N_\mathrm {ot}$ as a function of the lateral position at different stress times. It is clearly visible that a second $N_\mathrm {it}$ peak occurs due to interface states created by secondary generated majority carriers. Figure source: [101].

2.31 Turn-around of the threshold voltage shift: $\Delta V_{\mathrm {th}}$ as a function of stress time at various voltages. Initially $\Delta V_{\mathrm {th}}$ decreases due to minority charge trapping in the oxide while after 10ks it starts to increase due to trapping of majority carriers by interface defects. Figure source: [101].

2.32 Contribution of active oxide defects at different stress conditions shown for a pMOSFET: Schematic illustration of eight uniformly distributed oxide defects. Top: At homogneous NBTI stress conditions (left) all defects capture a hole, each shown as filled circles and emit at recovery conditions (right), shown as empty circles. Therefore, all defects contribute to the recoverable component. Bottom: At inhomoneous NBTI stress or in more general mixed stress conditions where $V_\mathrm {G}$   $=V_\mathrm {G}^\mathrm {str}$ and $V_\mathrm {D}$   $=V_\mathrm {D}^\mathrm {str}$ (left) three defects near the source capture a hole each, illustrated as filled circles, two defects in the center capture a hole each but with a reduced occupancy, shown as light red filled circles and three defects near the drain do not capture a hole at all, shown as empty circles. At recover conditions (right) only defects which have captured a hole during stress – something in between of three and five – emit. Therefore, only three to five defects contribute to the recoverable component instead of eight.

2.33 Narrowing of the active energy region from source to drain: Due to the inhomogeneous $E_\mathrm {OX}$ in the case of mixed NBTI/HC stress, the active energy region narrows from source to drain. Therefore, less defects contribute to degradation and recovery at the drain-side than at the source-side.

2.34 Step height with respect to the drain voltage at different lateral positions: The $d$ $($ $V_\mathrm {D}$ $)$ characteristics for 2.2 nm thick $\ch{SiON}$ oxide film pMOSFETs with $W$   $=$  150 nm and $L$   $=$  100 nm with $100$ different random dopant configurations and four different lateral defect coordinates $X_\mathrm {T}$ simulated using TCAD. The red lines indicate the characteristics with average (solid) and plus/minus standard deviation cubic parameterization coefficients (dashed). Since the shape of the curves is more strongly affected by the lateral trap position than by the random dopant distribution, it can be used as a defect fingerprint and allows to evaluate the lateral defect coordinate. Figure source: [104].

3.1 Range of stress conditions: Schematic illustration of the different stress conditions NBTI, HCD and mixed NBTI/HC. The area of stress conditions defines the boundaries of the 2-dimensional parameter space $($ $V_{\mathrm {D}}^\mathrm {str}$ $,$ $V_{\mathrm {G}}^\mathrm {str}$ $)$ applied in this thesis. Different colors separate the voltage combinations which trigger different degradation mechanisms, while the color intensity indicates the increasing impact of the stress on the parameter shifts.

3.2 OTF measurement procedure at NBTI conditions: $V_{\mathrm {G}}^\mathrm {str}$ is modulated periodically at a certain $V_\mathrm {D}^\mathrm {meas}$ while $I_\mathrm {D}$ is determined. With this, the transconductance $g_\mathrm {m}=\Delta I_\mathrm {D}/\Delta V_\mathrm {G}^\mathrm {str}$ can be calculated for each modulation step.

3.3 Transfer characteristic before and after stress: Both curves are fitted using the SPICE level 1 model (dashed lines), which describes $I_\mathrm {D}$ above $g_\mathrm {m,max}$ very well. The difference between the zero crossing points is $\Delta V_{\mathrm {th}}$ . Figure source: [107].

3.4 Experimental setup for the CP technique: The gate is pulsed by a generator between accumulation and inversion while the source to substrate and drain to substrate diodes are slightly reverse biased ( $V_\mathrm {R}$ ). Simultaneously, the $I_\mathrm {CP}$ is measured.

3.5 Schematic illustration of the charge pumping effect: $I_\mathrm {CP}$ is measured as a change of $I_\mathrm {B}$ when sweeping $V_\mathrm {G}$ between inversion and accumulation back and forth. $I_\mathrm {CP}$ corresponds to the recombination current of trapped minority carriers and majority carriers and is a measure for the interface charge density.

3.6 Effective channel length: Due to lateral doping profile the local $V_{\mathrm {th}}$ and $V_\mathrm {FB}$ differs along the channel. Depending on $V_\mathrm {GL}$ and $V_\mathrm {GH}$ different channel areas contribute to $I_\mathrm {CP}$ . For pulse (a) only for the lightly doped regions near the source and the drain contribute to $I_\mathrm {CP}$ . Therefore the effective length is $L_\mathrm {eff,a}$ . For pulse (b) a broader region, including the central region of the channel, contributes to $I_\mathrm {CP}$ . Therefore the effective length is $L_\mathrm {eff,b}$ . Figure source: [112].

3.7 Constant amplitude CP method: $V_\mathrm {GL}$ is swept through a broad voltage range from $V_\mathrm {GL}$   $<$   $V_\mathrm {FB}$ to $V_\mathrm {GL}$   $>$   $V_{\mathrm {th}}$ while $t_\mathrm {r}$ , $t_\mathrm {f}$ and $\Delta V_\mathrm {G}$ are constant as shown on the left hand side. $I_\mathrm {CP}$ ( $V_\mathrm {GL}$ ) shown on the right hand side increases with increasing $V_\mathrm {GL}$ as long as $V_\mathrm {GL}$   $<$   $V_\mathrm {FB}$ , is at its maximum when both $V_\mathrm {GL}$   $<$   $V_\mathrm {FB}$ and $V_\mathrm {GH}$   $>$   $V_{\mathrm {th}}$ are fulfilled, and finally decreases with further increase of $V_\mathrm {GL}$ when only $V_\mathrm {GL}$   $>$   $V_\mathrm {FB}$ is satisfied. Figure source: [112].

3.8 Experimental setup for C-V profiling: At the bulk contact an AC signal with a DC offset is applied and the phase-shifted $I_\mathrm {G}$ is measured.

3.9 C-V measurement procedure: The DC offset $V_\mathrm {B,DC}$ drives the MOSFET from accumulation to inversion. The AC component with the amplitude $|v_\mathrm {B}(t)|$ induces a phase-shifted gate current $i_\mathrm {G}(t)$ , which contains the information of the defects which capture and emit charge carriers at a certain energy level.

3.10 C-V curves for a pMOSFET: The shape of the C-V curves in Figure 3.10 changes during stress and recovery. From these changes the information about the defects at different energy levels contributing to degradation and recovery as well as about $V_{\mathrm {th}}$ and $V_\mathrm {FB}$ can be extracted.

3.11 MSM sequence: The applied gate and drain voltages (S) are interrupted periodically in order to characterize the degradation state of the device, e.g., by taking an $I_\mathrm {D}$ - $V_\mathrm {G}$ curve (M). The monitored parameter, e.g., $V_{\mathrm {th}}$ is extracted and the degradation over time is obtained. The overall stress time is obtained as $t_\mathrm {str}= \DOTSB \sum@ \slimits@ _{i} t_{\mathrm {str},i}$ .

3.12 Two different methods to extract the threshold voltage shift during recovery: The cv and cc methods. Top: Characteristics of an unstressed device (blue) and of a device after degradation (red). During the measure phase the parameters and thus the shape of the $I_\mathrm {D}$ - $V_\mathrm {G}$ characteristics drift towards their initial values. Bottom: $\Delta V_{\mathrm {th}}$ is monitored using either the cv method (orange) by recording $i_\mathrm {D}^\mathrm {cv}(t)$ at a constant voltage near $V_{\mathrm {th}}$ and mapping to $\Delta V_{\mathrm {th}}$ using the initial $I_\mathrm {D}$ - $V_\mathrm {G}$ or the cc method (green) by recording $v_\mathrm {G}^\mathrm {cc}(t)$ at a constant current near the threshold current.

3.13 Experimental setup for the cv method: The voltages applied to the gate and drain contacts are realized as constant voltage sources. $I_\mathrm {D}$ is measured using a transimpedance amplifier, where the feedback resistors $R_\mathrm {f,n}$ define the measurement range.

3.14 Measurement procedure for the cv method: After the initial characterization of the unstressed device, $V_{\mathrm {G}}^\mathrm {str}$ and $V_{\mathrm {D}}^\mathrm {str}$ are applied. During $t_\mathrm {str}$ $I_\mathrm {D}$ degrades. Afterwards, the measurement voltages $V_\mathrm {G}^\mathrm {cv}$ and $V_{\mathrm {D}}^\mathrm {rec}$ are applied and $I_\mathrm {D}$ recovers. During the last phase, $i_\mathrm {D}^\mathrm {cv}$ is recorded in order to extract $\Delta V_{\mathrm {th}}$ .

3.15 Experimental setup for the cc method: The main difference to the cv method is that the drain current during the recovery phase is controlled by a feedback loop of an operational amplifier in order to achieve a constant value, typically near the threshold current.

3.16 Measurement procedure for the cc method: After the initial characterization of the unstressed device, $V_{\mathrm {G}}^\mathrm {str}$ and $V_{\mathrm {D}}^\mathrm {str}$ are applied. During $t_\mathrm {str}$ $I_\mathrm {D}$ degrades. Afterwards, the measurement voltage $V_{\mathrm {D}}^\mathrm {rec}$ is applied while $I_\mathrm {D}$ is held at the constant value $I_\mathrm {D}^\mathrm {cc}$ . During the last phase, $v_\mathrm {G}^\mathrm {cc}$ recovers and is recorded in order to extract $\Delta V_{\mathrm {th}}$ .

3.17 Difference between considered device variability and not considered device variability: Top: Variability is considered as the recovery conditions are chosen in equidistant intervalls to $V_{\mathrm {th,0}}$ for each device individually. This ensures that the measurement current for the cc method corresponds always to the measurement voltage in the cv method indicated by the black markers. Bottom: Variability is not considered as the recovery conditions are fixed for every device so that in average $I_\mathrm {D}^\mathrm {cc}=I_\mathrm {D}(V_\mathrm {G}^\mathrm {cv})$ . For devices which deviate from the average characteristics the recovery conditions set in the cv method (indicated by the orange markers) differ from recovery conditions set in the cc method (indicated by the green markers), which leads to a significant difference of the extracted $\Delta V_{\mathrm {th}}$ .

3.18 Threshold voltage shift at different recovery conditions: The $\Delta V_{\mathrm {th}}$ recovery trace differs for different recovery conditions.

3.19 Correlation of $\delta$ with the degradation of MOSFET parameters: Each point in the scatter plots corresponds to the degradation after subjecting the MOSFET to a particular $V_\mathrm {G}^\mathrm {str}$ - $V_\mathrm {D}^\mathrm {str}$ combination. The relative difference $\delta$ increases with larger degradation and it is in average lower for the subthreshold region.

3.20 Recovery traces of the threshold voltage shift monitored with the cv and cc method: Degradation caused by mixed NBTI/HC stress leads to different evolutions of $\Delta V_{\mathrm {th}}$ recovery.

3.21 Unstable stress voltages in the cc method: The applied voltages are not stable during stress as soon as $V_{\mathrm {D}}^\mathrm {str}$   $\not =$  0 V. As soon as the device degrades its $g_\mathrm {m}$ reduces and the ratio between the drain-to-source voltage and the voltage over the serial resistance $R_\mathrm {sense}$ changes. Both, the voltage between the drain and the source contact ( $V_\mathrm {DS}$ ) and the voltage between the gate and the source contact ( $V_\mathrm {GS}$ ) drift slightly, which results in voltage differences $\Delta V_\mathrm {DS}$ and $\Delta V_\mathrm {GS}$ compared to the unstressed device.

3.22 Stable stress voltages with offset in the cv method: The constant offset in the voltage between the drain and the source contact ( $V_\mathrm {DS}$ ) and the voltage between the gate and the source contact ( $V_\mathrm {GS}$ ) means that the preset stress voltages do not correspond to the applied voltages.

3.23 Threshold voltage shift after different stress conditions: Even slight deviations of the stress conditions can make a difference in the $\Delta V_{\mathrm {th}}$ recovery traces.

3.24 Occupancy with respect to the stress time: With increasing stress time the occupancy of the defect D1 increases. As a consequence the number of emission events increases. The occupancy can be calculated for each stress time as the ratio between the number of emission events ( $N_\mathrm {e}$ ) and the number of recovery traces ( $N_\mathrm {t}$ ). By fitting the measurement points with an exponential function (Equation 3.11, $\tau _{\mathrm {c}}$ can finally be extracted.

3.25 Poly-heater-device system: Polycrystalline silicon wires (poly-heater) are processed near the MOSFET and are electrically isolated.

3.26 Experimental setup for temperature accelerated measurements: The voltages applied to the gate and drain contacts are realized as constant voltage sources and $I_\mathrm {D}$ is measured using a transimpedance amplifier. The heating with the polyheater is realized with a constant voltage source $V_\mathrm {PH}$ . Simultaneously the poly-heater current $I_\mathrm {PH}$ is measured.

3.27 Measurement procedure using a poly-heater: During an MSM sequence, the temperature can be elevated, e.g., during recovery. This would accelerate recovery, which allows for the characterization of effects typically lying outside the measurement window.

3.28 Schematic poly-heater calibration: $I_\mathrm {D}$ is obtained at the required $T_\mathrm {chuck}$   $=$   $T_\mathrm {dev}$ for $P_\mathrm {PH}$   $=$  0 W and at different $P_\mathrm {PH}$ at a fixed $T_\mathrm {chuck}$ , which corresponds to the $T_\mathrm {min}$ of the setup. $I_\mathrm {D}$ $($ $T_\mathrm {chuck}$ $)$ and $I_\mathrm {D}$ $($ $P_\mathrm {PH}$ $)$ are fitted with a polynomial fit of first or second order. With the coefficients of the fits, $T_\mathrm {dev}$ $($ $P_\mathrm {PH}$ $)$ is interpolated for arbritrary poly-heater power at a certain $T_\mathrm {chuck}$ .

3.29 Heating and cooling characteristics: For $T_\mathrm {chuck}$   $=$  −60 °C. (1) Left: The heater power is abruptly turned on. Right: Within 1 ms the maximum of $P_\mathrm {PH}$ is reached. Afterwards, $P_\mathrm {PH}$ tends to decrease slightly for approximately 1 s until the thermal equilibrium between heater, wafer and chuck is restored. Due to the delayed thermal coupling of poly-heater and MOSFET, $T_\mathrm {dev}$ needs up to 10 s until stabilization. (2) Left: The heater power is abruptly turned off. Right: $P_\mathrm {PH}$ decreases to zero within 1 ms and $T_\mathrm {dev}$ needs up to 10 s until it reaches $T_\mathrm {chuck}$ . Figure source: [120].

3.30 Dependence of the drain current on the dissipated poly-heater power in packaged large-area devices: The left panels show $I_\mathrm {D}$ and $P_\mathrm {PH}$ after the poly-heater is turned on and the right panels show $I_\mathrm {D}$ and $P_\mathrm {PH}$ after the poly-heater is turned off. While the stabilitzation of $P_\mathrm {PH}$ needs approximately 10 ms, the stabilization of $T_\mathrm {dev}$ needs 30 min at least (100 s are shown in this figure).

3.31 Control loop: A controller (in this case a PID controller) calculates an error value as the difference between the setpoint and the process variable. Based on this error, a correction is applied to the system.

4.1 RTN in large-area device: Top: The measured $\Delta V_{\mathrm {th}}$ trace contains at least three RTN signals but only the one with the largest step height $d$   $\approx$  0.2 mV can be analyzed reliably for different temperatures and gate biases. Bottom: The three single RTN signals are shown schematically.

4.2 Characteristic capture and emission times obtained from the RTN analysis: $\tau _{\mathrm {c}}$ and $\tau _{\mathrm {e}}$ behave similarly to an individual defect in a nano-scale device. With increasing $|$ $V_\mathrm {G}$ $|$ $\tau _{\mathrm {c}}$ decreases and $\tau _{\mathrm {e}}$ increases. Both decrease with increasing temperature.

5.1 Recovery after mixed NBTI/HC stress: Seven cycles of 5 ks stress and 10 ks recovery at a constant $V_{\mathrm {G}}^\mathrm {str}$ and increasing $|$ $V_{\mathrm {D}}^\mathrm {str}$ $|$ were performed. Top: Recovery traces show the reduction of $R$ with $V_{\mathrm {D}}^\mathrm {str}$ . Bottom: Comparison of $R$ and a simulation using an electrostatic model. A discrepancy between $R_\mathrm {measured}$ and $R_\mathrm {model}$ can be seen, especially at $V_{\mathrm {D}}^\mathrm {str}$   $<$  −2 V. $R$ can be negligibly small (less than 1 mV in 10 ks of recovery) after mixed NBTI/HC stress. Figure source: [105].

5.2 Degradation after stress: $\Delta V_{\mathrm {th}}^\mathrm {AS}$ was extracted at $t_\mathrm {rec,min}$   $=$  3 ms. Top: For $t_\mathrm {str}$   $=$  20 ms the reduction of $E_\mathrm {OX}$ across the gate oxide near the drain region suppresses NBTI with increasing $|$ $V_{\mathrm {D}}^\mathrm {str}$ $|$ . For larger $t_\mathrm {str}$ it can be seen that with increasing $|$ $V_{\mathrm {D}}^\mathrm {str}$ $|$ , the interplay between NBTI and HCD leads to two local minima of $\Delta V_{\mathrm {th}}^\mathrm {AS}$ , at $V_{\mathrm {D}}^\mathrm {str}$   $=$  −0.5 V and $V_{\mathrm {D}}^\mathrm {str}$   $=$  −2 V. Center: Similar to the top panel. With increasing stress time a drift minimum starts to form at $V_{\mathrm {D}}^\mathrm {str}$   $=$  −0.5 V. Bottom: The minimum of $\Delta V_{\mathrm {th}}^\mathrm {AS}$ at $V_{\mathrm {D}}^\mathrm {str}$   $=$  −0.5 V forms clearly for $t_\mathrm {str}$   $=$  11.1 s and $t_\mathrm {str}$   $=$  1.11 ks as discussed in [25, 26]. Figure source: [124].

5.3 Stress and recovery traces at two different gate stress biases: The $\Delta V_{\mathrm {th}}$ drift during stress depends strongly on $t_\mathrm {str}$ . Below 100 s the degradation at $V_{\mathrm {D}}^\mathrm {str}$   $=$  0 V (NBTI) dominates. Above this stress time degradation is more and more dominated by the HC regime. Figure source: [124].

5.4 Degradation of the drain current in the linear and saturation regime: While the degradation behavior at $V_{\mathrm {G}}^\mathrm {str}$   $=$  −1.5 V and $t_\mathrm {str}$   $=$  1.11 ks is comparable to the results in literature, the curves for $V_{\mathrm {G}}^\mathrm {str}$   $=$  −1.5 V and $t_\mathrm {str}$   $=$  11.1 s show that $\Delta I_\mathrm {D,lin}$ and $\Delta I_\mathrm {D,sat}$ is higher for lower stress times at certain $($ $V_{\mathrm {G}}^\mathrm {str}$ $,$ $V_{\mathrm {D}}^\mathrm {str}$ $)$ combinations. This means that the degradation evolution of both turns around during stress. Similar behavior was also observed for the degradaton of $g_\mathrm {m,max}$ and $SS$ . Figure source: [124].

5.5 Degradation and recovery of the drain current in the linear and in the saturation region as well as the threshold voltage shift: The degradation and recovery were measured by short interrupts of the stress and recovery phase in order to measure $I_\mathrm {D,lin}$ and $I_\mathrm {D,sat}$ . Especially $\Delta I_\mathrm {D,lin}$ but also $\Delta I_\mathrm {D,sat}$ show a local maximum after one second of stress, a local minimum after approximately ten seconds of stress, and increases for larger stress times. No turn-around effect was measured for $\Delta V_\mathrm {th}$ .

5.6 Extraction of the lateral position: The lateral position $X_\mathrm {T}$ $/$ $L$ (0 at source, 1 at drain) was extracted by exploiting the recovery drain bias dependence of the step heights for constant $V_{\mathrm {G}}^\mathrm {rec}$ [104]. The subfigures show the separation of the defects into three types according to their capture behavior during mixed NBTI/HC stress: blue group, green group and magenta group. Measurement data and linear fits are labled with the defect name and the extracted relative lateral position. Figure source: [105].

5.7 Lateral defect distribution: Schematic sketch of the positions of the nine characterized defects within the oxide. Figure source: [105].

5.8 Recovery traces of nano-scale devices after different stress conditions: Six of 100 measured recovery traces show the behavior of the unique steps caused by single defects in the devices B and A. The percentage of emission events is not scaled directly proportional since only six of the 100 recorded traces are shown. Figure source: [105].

5.9 Capture characteristics: For (a) NBTI stress and (b) mixed NBTI/HC stress. Figure source: [105]

5.10 Occupancy versus capture time: A parameterization of $V_{\mathrm {G}}^\mathrm {str}$ and $V_{\mathrm {D}}^\mathrm {str}$ demonstrates the difference between green and magenta type shown for three defects. Dashed lines: For NBTI stress the occupancy increases and $\tau _{\mathrm {c}}$ decreases for increasing $|$ $E_\mathrm {OX}$ $|$ (corresponds to an increasing $|$ $V_{\mathrm {G}}^\mathrm {str}$ $|$ ). Solid lines: As soon as $V_{\mathrm {G}}^\mathrm {str}$ is held at a constant value and $V_{\mathrm {D}}^\mathrm {str}$   $<$  0 V, the occupancy of the green defects shows a reversed trend compared to NBTI. The occupancy decreases and $\tau _{\mathrm {c}}$ increases. This can be explained by the reduction of $E_\mathrm {OX}$ near the drain for $V_{\mathrm {D}}^\mathrm {str}$   $<$  0 V. By contrast, the occupancy of the magenta defects shows a completely different trend, namely towards decreasing $\tau _{\mathrm {c}}$ for a decreasing occupancy. This is an indication for a different process. Figure source: [105].

5.11 Emission time characteristics: The emission time decreases with $|$ $V_\mathrm {D}$ $|$ . As a consequence, if $\tau _{\mathrm {e}}$ $\ll$ $\tau _{\mathrm {c}}$ at stress conditions, the defect captures a charge carrier but immediately emits it before switching to recovery conditions. This holds true for all defects of the green and magenta group.

5.12 Change of occupancy in respect of the ratio of emission to capture time: Shifts of $\tau _{\mathrm {e}}$ and $\tau _{\mathrm {c}}$ by a few orders of magnitude affect the occupancy. Top: Schematic visualization of the shift from $\tau _{\mathrm {e}}$ $\ll$ $\tau _{\mathrm {c}}$ to $\tau _{\mathrm {e}}$ $\gg$ $\tau _{\mathrm {c}}$ at stress conditions. Bottom: Occupancy in respect to the ratio $\tau _{\mathrm {e}}$ / $\tau _{\mathrm {c}}$ is zero if $\tau _{\mathrm {e}}$ $\ll$ $\tau _{\mathrm {c}}$ and at its maximum if $\tau _{\mathrm {e}}$ $\gg$ $\tau _{\mathrm {c}}$ . Figure source: [124].

5.13 Schematic illustration of capture and emission events: The charge state of the defect 0 if it is neutral and 1 if it is charged. Top: $\tau _{\mathrm {e}}$ $\gg$ $\tau _{\mathrm {c}}$ at stress condition. The defect captures a hole during stress and emits it during recovery. Center: $\tau _{\mathrm {e}}$ $\ll$ $\tau _{\mathrm {c}}$ at stress condition. The defect captures a charge carrier and emits it immediately afterwards at stress conditions. As a consequence, no emission event can be measured at recovery conditions. Bottom: Volatile defects are not electrically active.

5.14 Distribution function of holes and electrons in the vicinity of the source: Under homogeneous NBTI conditions ( $V_\mathrm {G}$   $=$  −1.5 V) the carriers in the channel are in equilibrium and thus properly described by the Fermi-Dirac distribution. By contrast, as soon as a drain bias is applied the carrier ensemble can be severely out of equilibrium. Furthermore, if the device is operated near or beyond pinch-off conditions carriers with sufficient kinetic energy can trigger II and consequently generate secondary carriers. With a thorough carrier transport treatment by means of a solution of the BTE for each $($ $V_{\mathrm {G}}^\mathrm {str}$ $,$ $V_{\mathrm {D}}^\mathrm {str}$ $)$ combination and under consideration of secondary generated carriers the distribution functions for $V_\mathrm {D}$   $<$  0 V can significantly differ from the equilibrium solution.

5.15 The lateral electric field and carrier concentration: For the simulation of the transition rates between the defect states $1$ and $2^\prime$ and the states $2$ and $1^\prime$ of the four-state NMP model at different $V_\mathrm {D}$ .

5.16 Gate bias dependence of the characteristic times of switching defect B1 modeled with the four-state NMP model: The left panel shows the measurement data (circles) and the simulation results (solid lines). The right panels show the shift of the defect due to an increased $E_\mathrm {OX}$ (top) and the different capture and emission pathways which cause the switching behavior. The switching point describes the change from the preferred path for emission $2 \rightarrow 2^\prime \rightarrow 1$ to $2 \rightarrow 1^\prime \rightarrow 1$ . Charging the defects always proceeds over the path $1 \rightarrow 2^\prime \rightarrow 2$ . Figure source: [125].

5.17 Experimental characterization of the defect B1 for increased drain voltage vs. simulation results obtained with the NMP model: Top: $\tau _{\mathrm {e}}$ and $\tau _{\mathrm {c}}$ for $V_\mathrm {G}$   $=$  −1.5 V and $V_\mathrm {G}$   $=$  −2.5 V. Center: Simulated occupancy for different $t_\mathrm {str}$ . Bottom: Occupancy at $t_\mathrm {str}$   $=$  2 s – simulation (dashed lines) and experimental data (open circles). Figure source: [125].

5.18 Recovery in large-area pMOSFETs: The open circles show the experimental data and the solid and dashed lines illustrate the simulated threshold voltage shifts. Top: Comparison of simulation and experimental data for homogeneous BTI conditions. This data set was used to calibrate the NMP model to extract a unique parameter set for all simulations. Bottom: $R$ after mixed stress conditions. The NMP $_\mathrm {neq}$ model (solid lines) captures the experimental trend, while the equilibrium NMP model (dashed lines) fails to predict the recovery behavior. Figure source: [125].

5.19 Comparison of the distribution of charged oxide defects directly after stress in large-area pMOSFETs: Using the NMP $_\mathrm {eq.}$ model defects in the source region are unaffected by an increased $V_\mathrm {D}$ . Defects located near the drain as well as in the middle of the channel may remain uncharged due to the reduced oxide field. The NMP $_\mathrm {neq.}$ model predicts a faster reduction of charged defects (highlighted areas) with increasing drain bias. Remarkably, defects located near the source may remain uncharged as well, which corresponds to the experimental observations. Figure source: [125].

5.20 Recoverable component of homogeneous NBTI stress: Reduction of $R$ after NBTI due to a preceeding NBTI stress (a) and reduction of $R$ after NBTI recovery due to former mixed NBTI/HC stress (b).

5.21 Overall degradation and recovery after NBTI stress of device B: TDDS cycles with NBTI and mixed NBTI/HC stress were recorded at $T$   $=$  145 °C. Except of region (image) measurement cycles were performed like shown in Figure 5.20b top – NBTI stress / recovery / mixed NBTI/HC stress / recovery / ... Parameters obtained from NBTI measurements are summarized here. Regions: (image) NBTI stress recovery cycles with $V_{\mathrm {G}}^\mathrm {str}$   $=$  −2.2 V, $t_\mathrm {str}$   $=$  1 s and different recovery voltages $V_{\mathrm {G}}^\mathrm {rec}$ and $V_{\mathrm {D}}^\mathrm {rec}$ , (image) $V_{\mathrm {D}}^\mathrm {str}$   $=$  −1 V and different $V_{\mathrm {G}}^\mathrm {str}$ , (image) $V_{\mathrm {D}}^\mathrm {str}$   $=$  −1.5 V and different $V_{\mathrm {G}}^\mathrm {str}$ , (image) $V_{\mathrm {D}}^\mathrm {str}$   $=$  −2 V and different $V_{\mathrm {G}}^\mathrm {str}$ , (image) different $V_{\mathrm {G}}^\mathrm {str}$ and $V_{\mathrm {D}}^\mathrm {str}$ , (image) cycles with $V_{\mathrm {G}}^\mathrm {str}$   $=$  −2.5 V and $V_{\mathrm {D}}^\mathrm {str}$   $=$  −2.7 V. $R$ reduces because B1 and B2 change their step heights due to the former applied mixed NBTI/HC stress. It was found that it is more likely for defects with larger step heights, which dominate $R$ , to reduce. Furthermore, some defects like B1 become inactive and do not contribute to $R$ anymore.

5.22 Spectral maps of devices B and C after NBTI stress: The spectral maps of the unstressed devices (top) shows that B1, C1, C2 and C3 are active after NBTI stress. After several cycles of mixed NBTI/HC stress B1, C1, C2 and C3 disappear completely from the spectral map. Especially in device C almost no defect contributes to recovery.

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