5.2.3 Comparison Gate Recess versus InGaN Cap Layer

For this comparison the same InGaN cap device is used as described in the previos section. The gate recess structure and its fabrication is reported by Palacios et al. [49]. The 11 nm thick GaN channel is grown on-top of a 1 nm thick In$ _{0.1}$Ga$ _{0.9}$N back-barrier. A 1 nm thick AlN layer between the channel and the 25 nm Al$ _{0.33}$Ga$ _{0.67}$N is grown in order to improve the electron mobility. After the AlGaN surface treatment a 12 nm gate recess is performed, resulting in a gate-to-channel distance of 13 nm. The gate length $ L_\ensuremath {\mathrm {g}}$ is 160 nm, source-gate distance is 0.6 $ \mu$m, and gate-drain distance is 0.9 $ \mu$m. Simulation Results

Fig. 5.61 shows the results for the transfer characteristics of both devices. After the calibration of the sheet charges a good agreement is achieved. The InGaN/GaN device exhibits lower current. However, a higher threshold voltage is achievable without recessing the InGaN cap layer [18]. The threshold voltage of the recess device can be increased, too, (Fig. 5.62) by increasing the recess depth.

Figure 5.61: Comparison of the measured (symbols) and simulated (lines) transfer characteristics at $ V_\ensuremath {\mathrm {DS}}$=5 V.
Figure 5.62: Simulated transfer characteristics at $ V_\ensuremath {\mathrm {DS}}$=5 V for HEMTs with different gate recess depths.

Fig. 5.63 compares the DC transconductance $ g_\ensuremath {\mathrm {m}}$ for both devices. The decrease in the measured $ g_\ensuremath {\mathrm {m}}$ of the InGaN/AlGaN/GaN transistor at higher gate bias might be due to non-idealities in the source and drain ohmic contacts, which are not considered in the simulation. As expected, the recessed gate device exhibits a higher $ g_\ensuremath {\mathrm {m}}$ due to the much shorter gate length $ L_\ensuremath {\mathrm {g}}$ and the reduced gate-to-channel separation.

Figure 5.63: Comparison of the measured (symbols) and simulated (lines) DC transconductance $ g_\ensuremath {\mathrm {m}}$ at $ V_\ensuremath {\mathrm {DS}}$=5 V.

AC analysis of the transistors is also performed. The recessed gate structure ( $ L_{\mathrm{g}} =0.16 \mu\ensuremath{\mathrm{m}}$) exhibits a cut-off frequency $ f_\ensuremath {\mathrm {t}}$=85 GHz, compared to $ f_\ensuremath {\mathrm {t}}$=10 GHz for the InGaN/AlGaN/GaN device ( $ L_{\mathrm{g}} =1.9 \mu\ensuremath{\mathrm{m}}$). Note that the product $ f_\ensuremath {\mathrm {t}}$ $ \times L_\ensuremath{\mathrm{g}}$=19 GHz$ \cdot \mu$m is higher than 14.4 GHz$ \cdot \mu$m of the recessed-gate device. The simulation of an InGaN cap structure with $ L_{\mathrm{g}} =0.8 \mu\ensuremath{\mathrm{m}}$ shows that $ f_\ensuremath {\mathrm {t}}$=30 GHz can be achieved, which even gives $ f_\ensuremath {\mathrm {t}}$$ \times $ $ L_{\mathrm{g}}$=24 GHz$ \mu$m.

S. Vitanov: Simulation of High Electron Mobility Transistors