- 1.1. The simulation domain of the coaxial capacitor.
- 1.2. Unstructured grid refinement, 237 grid points. The resulting maximal discretization error is 134 mV.
- 1.3. Refinement, which is adapted to the given problem, grid points. The maximal discretization error is reduced to 8.7 mV.
- 1.4. Error of the adapted grid. Each curve results from a grid with ticks in radial direction. The total number of grid points is varied. A minimal error is reached, if the number of radial and tangential ticks are nearly of equal size.
- 1.5. Errors of the unstructured versus the adapted grid. The unstructured grid is refined by a maximum area constraint. The adapted grid generation is built with the same number of grid ticks in radial and tangential direction.
- 2.1. Two-dimensional ortho grids along axes-parallel and non-parallel geometry edges.
- 2.2. A two-dimensional mixed grid with rectangular and triangular elements to approximate the boundary. Terminating lines reduce the number of grid points.
- 2.3. A two-dimensional Voronoi box of the point
- 2.4. A detail of the Voronoi Region shown before.
- 2.5. Valid and invalid tessellations of two triangles.
- 2.6. Valid and invalid Voronoi edges at the surface. At the marginal case, the center of the outer-circle lies at the surface.
- 2.7. The coupling areas of a three-dimensional tetrahedral Delaunay grid around the point .
- 2.8. The coupling areas between two points of different tetrahedrons.
- 2.9. Valid and invalid Voronoi faces at the surface. At the marginal case, the center of the outer-sphere lies at the surface.
- 2.10. Three-dimensional grid criterion for Finite Elements.
- 2.11. Two-dimensional mesh criterion for Finite Elements
- 2.12. One-dimensional diffusion, diffusion constant , , no out-diffusion across . The initial concentration profile at and simulated distributions at and are shown.
- 2.13. Red-refinement of a triangle.
- 2.14. A red-refined triangle with a red-refined neighbor.
- 2.15. A red-refined triangle with green-refined neighbors.
- 2.16. Red-refinement of a tetrahedron into children, 4 tetrahedrons and an octahedron.
- 2.17. Final decomposition of the octahedron into 4 tetrahedrons.
- 2.18. Subsequent red-refinement of the octahedron into 6 parent-similar octahedrons and 8 grandparent-similar tetrahedrons.
- 2.19. Possible green neighbors of a red-refined triangle.
- 2.20. Two-dimensional grid refinement by line splitting.
- 2.21. Overview of the marching cubes algorithm [30].
- 3.1. Tetrahedrons around point with the resulting Voronoi box constructed by these tetrahedrons.
- 3.2. Box parts of the tetrahedron with drawn outer-sphere of the tetrahedron and outer-circle of the triangle .
- 3.3. Different Voronoi faces which share the point of a tetrahedron.
- 3.4. A detail of the tetrahedron shown in Figure 3.3 which shows the coupling Voronoi region between the point and . This region can be split into the two triangular components and which are spawned by the midpoint of the edge , the midpoint of the outer-circle of the triangle and the midpoint of the outer-sphere of the tetrahedron , or , , and , respectively.
- 3.5. Potential distribution between two grid points and with different permittivities.
- 3.6. Ratio of the approximated electric field to the exact solution at the center of the control volume.
- 3.7. A Voronoi box of the point at a boundary.
- 4.1. Netto doping of the semiconductor segment.
- 4.2. Well mask layout of the high voltage device.
- 4.3. Two-dimensional simulation of the drain-current far away from the tip of the finger.
- 4.4. Relevant iso-surfaces of the phosphorus doping and the pn-junctions of the finger. The relevant boron surface is approximatively represented by the pn-junction which is located under the surface of the wafer.
- 4.5. Surfaces surrounding the space charge regions between both pn-junctions.
- 4.6. Simulation of the original finger structure compared to the measurement of four test wafers.
- 5.1. Structure of a two-dimensional MOS transistor.
- 5.2. The carrier concentration of the two-dimensional device simulation with a gate-source and gate-substrate voltage of 10 V.
- 5.3. The current density of the two-dimensional device simulation at
- 5.4. Comparison of the simulation approaches. The first two-dimensional simulation is performed on a dense grid with a grid spacing of 0.01 nm under the gate. The coarse grid has a spacing of 20 nm under the gate. These simulations are compared with the derived analytical solution,
- 5.5. Refinement of a two-dimensional triangular grid.
- 5.6. Two-dimensional capacitor with the electrodes and drawn field and equipotential lines.
- 5.7. Capacitor with electrodes at top and bottom.
- 5.8. Cuboidal capacitor, original electrodes, potential distribution.
- 5.9. Cuboidal capacitor, first electrode-replacement, potential distribution.
- 5.10. Cuboidal capacitor, second electrode-replacement, potential distribution.
- 5.11. Cuboidal capacitor, with the equipotential surfaces of the three electric fields that are spawning the cuboids.
- 5.12. Domain for the electric field calculation.
- 5.13. Spherical capacitor with electrodes placed at the top and bottom (hidden) cups. The electrodes for the second potential calculation are placed at the remaining cups at the left and right side. The electrodes for the third potential calculation are the remaining areas of the surface.
- 5.14. Potential and field lines of the spherical capacitor.
- 5.15. Three-dimensional structure with the placed electrodes.
- 5.16. Three-dimensional structure with a potential distribution and shown base grid, on which the potential evaluation is performed.
- 5.17. Final grid, developed by the potential method with shown potential distribution, contacts at left and right.
- 5.18. Final grid, a quarter of the device is cut away for illustration purposes.
- 6.1. Geometry of the simulated FinFET structure.
- 6.2. The oxide and silicon layers of the FinFET structure. The simulation grid is an ortho grid. The grid elements are split to tetrahedrons only for visualization purposes.
- 6.3. The oxide and silicon layers of the FinFET. The simulation grid is generated by the potential method. In the source and drain regions the approximation of the grid lines to the current lines can be seen.
- 6.4. Generated ortho grid in the active regions of the transistor. Only the oxide, silicon and polysilicon segments are shown.
- 6.5. Potential based tetrahedral grid in the active regions of the transistor. Only the oxide, silicon and polysilicon segments are shown.
- 6.6. Simulated output characteristic of the FinFET. The drain current is standardized by the gate length .
- 6.8. The cross section and typical layer thicknesses of the memory cell.
- 6.9. Expanded two-dimensional structure -- 8,800 points, 51,000 tetrahedrons.
- 6.10. Floating-gate and first oxide layer -- 18,300 points, 69,000 tetrahedrons.
- 6.11. ONO layers added -- 70,300 points, 341,000 tetrahedrons.
- 6.12. Final structure of the EEPROM cell -- 76,700 points, 402,000 tetrahedrons.
- 6.13. Distribution of the electric potential, 0 V at the floating-gate, 1 V at the control-gate -- 640,000 points, 3,400,000 tetrahedrons.

J. Cervenka: Three-Dimensional Mesh Generation for Device and Process Simulation