For the fabrication of interconnects two strategies are currently used. The subtractive method and the inlaid method also called damascene process. For aluminium the first process mentioned is used and the process flow for one
metallization layer is depicted in Figure 1.1. In the first step a silicon oxide is deposited (cf. Figure 1.1a) followed by the deposition of a photoresist. The photoresist is exposed to a UV light, transferring the pattern from the mask to
the photoresist layer. After dissolution of the areas exposed to the UV light, the photoresist shows the pattern of the mask and serves in the etching process as an etch mask for the silicon oxide layer. After etching the oxide (cf.
Figure 1.1b) the resist is removed and sequentially a barrier layer and a tungsten layer are deposited, filling the etched holes and forming a layer as shown in Figure 1.1c. To remove the unwanted barrier and tungsten layer, the wafer
is polished leaving only the filled holes back (depicted in Figure 1.1d). These holes form the vias responsible for the vertical connections between the metallization layers and between the metallization and the devices. Thereafter a
diffusion barrier, an aluminium layer, and another diffusion barrier are deposited (cf. Figure 1.1e). The diffusion barriers are formed by titanium and titanium nitride preventing the aluminium to diffuse into the silicon and as an
antireflective coating for lithography purposes [146, 148]. In the next step a photoresist is deposited and exposed to UV light to transfer the pattern from the mask. After dissolution of the exposed photoresist and etching the
aluminium exhibits the desired pattern depicted in Figure 1.1f. The last steps for this metallization layer are the removal of the unexposed photoresist and the deposition of an isolating oxide (cf. Figure ), which is polished to
receive a flat surface for eventually further following metallization layers.
By repeating this procedure a multi-layer interconnect structure is obtained .