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Degradation of Electrical Parameters of Power Semiconductor Devices – Process Influences and Modeling

Chapter 7 SiC-SiO2 degradation mechanisms

Charge pumping (CP) for SiC-MOSFETs, as introduced in the previous Chapter, allows to investigate degradation at the SiC-SiO2 interface precisely. With this, the reliability of SiC based MOSFETs is investigated in the following. Since only limited information regarding BTI and HCD is available for 4H-SiC MOSFETs [Ban+00; Lel+08; ALP13], the basic effect of BTS and HCS on the transistor parameters is investigated. The results presented in this Chapter have been previously published in [Pob+14].

7.1 Bias temperature stress

Compared to the virgin threshold voltage instability treated in Section 6.1, a larger stress bias of \( \gls {Vg}=\SI {50}{\volt } \) ( \( \approx \SI {6}{\mega \volt \per \centi \meter } \)) is used, which is close to the breakdown of the 80 nm thick SiO2 layer. This ensures that the instability caused by the stress phase is larger than the impact of the (math image) bias phase. Both stress polarities are tested to identify the type of created charges.

First, positive BTS (PBTS) is performed at 200 °C chuck temperature. The PBTS causes the transfer characteristic of the device to shift in parallel along the voltage axis towards larger (math image) values as shown in Fig. 7.1. This indicates the creation of 1.9 × 1011/cm2 negatively charged traps after 1 ks stress assuming the charges at the SiC-SiO2 interface.


Fig. 7.1: Transfer characteristics (top) and corresponding drift plots (bottom) for nMOSFETs subjected to PBTS [Pob+14].

The readout bias independence indicates that the charges created through PBTS are only in weak contact with the carriers in the channel during the transfer characteristic measurement. That is to say, charge exchange with these defects occurs on larger timescales. In accordance, the (math image) from a CP measurement within a few seconds after termination of stress is almost independent of the stress time, as shown in Fig. 7.2.


Fig. 7.2: Constant base level CP measurement results after PBTS with different duration. Details of the CP measurement are given in Section 6.2.

Also negative BTS (NBTS) at \( \gls {Vg}=\SI {-50}{\volt } \) causes the creation of readout-bias-independent charges as shown in Fig. 7.3 [ALP13].


Fig. 7.3: The same as Fig. 7.1 but for NBTS.

The magnitude of the drift is, however, smaller than after PBTS with the same absolute gate voltage value. The CP current stays constant as well (not shown).

To conclude, consistent with the results obtained for Si based MOSFETs described in Chapter 2, PBTS causes negative, and NBTS positive, gate bias independent charges, respectively. Due to the independence of the charges on the particular readout bias and the missing impact on the CP current, which would have indicated the creation of bias-dependent interface traps, it is suggested that the created charges reside within the oxide [She+11].