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Previous: 4.3 Analysis of minority carrier traps using photo-assisted CV Top: 4 Charge accumulation in high temperature processing steps Next: 4.5 Summary

4.4 Interpretation of the results

Although a change of the interface charging state after high temperature processing steps was expected before the study, the build up of such high amounts of positive fixed charges at the SiC/SiO₂ interface is a surprising outcome. Since the CV-curve after the initial high- (math image) step $P_1$ is nearly identical to the ideal one, although the thermal budget of $P_1$ is one of the highest, the deposition of the polycrystalline gate contact $P_2$ seems of fundamental importance for the involved mechanism.

4.4.1 Charge accumulation via impurity diffusion

A first possibility is that $P_2$ (poly-deposition) might add impurities, like mobile ions with low diffusion constants at room temperature, to the system. However, these mobile ions could have been present in the system already before $P_2$ . In this case, a voltage shift arises after $P_2$ due to the deposited gate contact, which introduces an electric field along the oxide layer due to the alignment of the Fermi levels. The mechanism is explained schematically in Fig. 4.9. After $P_1$ , the system is in thermal equilibrium and no electric field is present along the SiO₂ (left). Subsequently to $P_2$ , an oxide field (math image) arises due to the Fermi-level alignment. Therefore, positive mobile ions are able to diffuse along the direction of to the SiC/SiO₂ interface due to the very high processing temperatures. In the end, this leads to an accumulation of fixed positive charges at the SiC/SiO₂ interface. It is furthermore important to note that, likely due to diffusion quenching at low temperatures, it was not possible to move these trapped charges away from the interface (recover the CV curve to its ideal position) via a gate stress bias, even at elevated measurement temperatures of up to 200 °C.

Figure 4.9: Top: schematic band alignment during a high-temperature processing step. After $P_1$ , the system consists of the semiconductor with the oxide layer on top. Therefore, no electric field is present in the SiO₂ layer (left). In all following processing steps $P_2+$ , the silicon gate contact introduces an electric field in the oxide layer due to the Fermi level alignment (right). In combination with the high temperatures of several hundred Celsius, positive charges are now able to diffuse to the SiC/SiO₂ interface through the oxide layer, which leads to a build-up of positive charges at the interface. Bottom: schematic cross section indicating the accumulation of positive charges at the SiC/SiO₂ interface.

$ P_1 $ — Figure 4.9: Top: schematic band alignment during a high-temperature processing step. After $P_1$ , the system consists of the semiconductor with the oxide layer on top. Therefore, no electric field is present in the SiO₂ layer (left). In all following processing steps $P_2+$ , the silicon gate contact introduces an electric field in the oxide layer due to the Fermi level alignment (right). In combination with the high temperatures of several hundred Celsius, positive charges are now able to diffuse to the SiC/SiO₂ interface through the oxide layer, which leads to a build-up of positive charges at the interface. Bottom: schematic cross section indicating the accumulation of positive charges at the SiC/SiO₂ interface.

4.4.2 Hydrogen related charge accumulation

In addition to the previously discussed mobile ion mechanism, another possible explanation can be given using a hydrogen-based mechanism like the hydrogen-release model, which was described in Section 1.2.2. A simplified picture of the mechanism, which might lead to the observed charge accumulation, is shown in Fig. 4.10. During $P_1$ , the Tetraethylorthosilicat (TEOS) based SiO₂ film, which was deposited via chemical vapor deposition (CVD), is annealed in an inert dinitrogen (N₂) atmosphere at a temperature above 1000 °C for the time $\ac {t_ht}> \SI {100}{\min }$ . Due to the highly elevated temperature and the inert atmosphere, which results in a low H partial pressure in the chamber, trapped and residual hydrogen is likely to be released from the amorphous SiO₂ (Fig. 4.10, top, left). Therefore, no significant deviation of the CV curve from the ideal one should be observed after $P_1$ , which is indeed the case as was shown above using the simulated CV curves. After $P_1$ (POA), (math image) remains at approximately 1 × 10⁹/cm², which results in a close to the ideal flatband voltage (compare with Fig. 4.8, POA).

Figure 4.10: Proposed mechanism of positive charge accumulation at the SiO₂/SiC interface using a hydrogen based model. Top, left: during the post oxidation anneal ( $P_1$ ), H is removed from the SiO₂/SiC stack due to the high thermal budget and the inert gas composition in the chamber. Top, right: The deposition of the polycrystalline silicon gate introduces high amounts of H into the system. Furthermore, the positively charged hydrogen, $\text {\ac {H}}^+$ , is strongly affected by the oxide field, which results from the difference in work-functions of the poly-Si gate and 4H-SiC. Bottom, right: positively charged H is pushed in the direction of , which leads to a build-up of $\text {\ac {H}}^+$ at the SiC/SiO₂ interface and a significant shift of to more negative voltages. On the other hand, $\text {\ac {H}}^0$ does not move in a preferred direction due to the neutral charge state. Bottom, left: possible mechanism of hydrogen hopping. $\text {\ac {H}}^+$ binds to a bringing oxygen atom and is able to hop to a bringing oxygen atom in the vicinity by overcoming an energy barrier of approximately $\ac {Ebarrier} \approx \SI {1.4}{\eV }$ [58] resulting in a drift of bound $\text {\ac {H}}^+$ to the SiC/SiO₂ interface.

$ P_1 $ — Figure 4.10: Proposed mechanism of positive charge accumulation at the SiO₂/SiC interface using a hydrogen based model. Top, left: during the post oxidation anneal ( $P_1$ ), H is removed from the SiO₂/SiC stack due to the high thermal budget and the inert gas composition in the chamber. Top, right: The deposition of the polycrystalline silicon gate introduces high amounts of H into the system. Furthermore, the positively charged hydrogen, $\text {\ac {H}}^+$ , is strongly affected by the oxide field, which results from the difference in work-functions of the poly-Si gate and 4H-SiC. Bottom, right: positively charged H is pushed in the direction of , which leads to a build-up of $\text {\ac {H}}^+$ at the SiC/SiO₂ interface and a significant shift of to more negative voltages. On the other hand, $\text {\ac {H}}^0$ does not move in a preferred direction due to the neutral charge state. Bottom, left: possible mechanism of hydrogen hopping. $\text {\ac {H}}^+$ binds to a bringing oxygen atom and is able to hop to a bringing oxygen atom in the vicinity by overcoming an energy barrier of approximately $\ac {Ebarrier} \approx \SI {1.4}{\eV }$ [58] resulting in a drift of bound $\text {\ac {H}}^+$ to the SiC/SiO₂ interface.

The amount of available hydrogen in the system changes drastically after the deposition of the polycrystalline silicon gate in the process step $P_2$ (Fig. 4.10, top right). Here, the poly-Si gate is grown by chemical decomposition of silane (SiH₄) at a temperature slightly above 500 °C, which releases enormous amounts of hydrogen via pyrolysis. Additionally, also the SiO₂ film is flooded again with neutral $\text {\ac {H}}^0$ and positively charged protons $\text {\ac {H}}^+$ . Furthermore, the alignment of the Fermi levels results in an electric field (math image) along the oxide layer between the poly-Si metal gate and the semiconductor, which points in the direction of the SiC/SiO₂ interface, as already discussed in the previous section. Due to its neutral charge, $\text {\ac {H}}^0$ will not be affected by , which results in a random movement of $\text {\ac {H}}^0$ through the material (indicated via the arrows). On the other hand, the positive charge state, $\text {\ac {H}}^+$ , is strongly affected by (math image) resulting in a preferred direction of the hydrogen migration along the electric field, which points in the direction of the SiC/SiO₂ interface. The hydrogen migration process will continue in each additional high temperature manufacturing step, which in the end results in a high amount of positive charges trapped at the SiC/SiO₂ interface (Fig. 4.10, bottom right). In addition to the drift of the positive hydrogen, the neutral hydrogen $\text {\ac {H}}^0$ may occupy a trapping site close to the channel and capture a hole, thereby creating additional positive charges [58]. The accumulation of $\text {\ac {H}}^+$ is visible in the CV curves as a significant shift of (math image) to more negative voltages.

As discussed in Section 1.10, interstitial hydrogen, either in the positive or neutral configuration, will easily bind to several precursors in the amorphous SiO₂ with a low energy barrier of $\ac {Ebarrier}<\SI {0.15}{\eV }$ [58]. Therefore, hydrogen diffusion in the dielectric seems to be limited. However, H bonded to a bridging oxygen atom is able to "hop" from one bound state to the next bound state by overcoming a barrier of approximately $\ac {Ebarrier} \approx \SI {1.4}{\eV }$ as depicted in Fig. 4.10 (bottom, left), which likely results in an additional specific temperature dependence of the observed charge accumulation mechanism.

In the next section, it will be shown that the extracted activation energy of the observed charge accumulation mechanism during high temperature processing steps is in the range of proposed energy barriers for hydrogen-related models [48, 58, 132].

Barrier extraction

For the extraction of the energy barrier (math image) , we assume the diffusivity of hydrogen in the the amorphous SiO₂ is not rate limiting [70], and the underlying mechanism is related to hydrogen release (see Section 1.9), which is of course speculative. It is important to note that the knowledge of the exact atomistic mechanism is not necessary for the energy barrier extraction. Therefore, the hydrogen release mechanism is only exemplary. In reality, there might be numberless candidates, which qualify according to the extracted energy barrier.

For a normally distributed (math image) , the release of $\text {\ac {H}}^0$ from the bound state to the interstitial state, should also be distributed in time with a specific time constant for each transition event. Here, obeys the Maxwell–Boltzmann statistics according to

$(4.1) \{begin}{align} \ac {tau_h} = \tau _{0} \exp \left ( \frac {\ac {Ebarrier}}{\ac {kb}T} \right ) \{end}{align}$

with the Boltzmann constant (math image) , the temperature and the pre-exponential factor $\ac {tau0}$ .

The energy barrier (math image) which has to be overcome to enable the accumulation of positive charges at the SiC/SiO₂ interface, was extracted by using a fit of the flatband voltage shift as a function of the time , for which the sample was subjected to a high temperature. For a normally distributed , has to obey

$(4.2) \{begin}{align} \label {eq:Eb_tb} \ac {dVfb}\left ( \ac {t_ht} \right ) = \frac {\ac {dVfbmax}}{2} \, \textrm {erfc} \left (- \frac {\ac {kb}T\ln (\frac {\ac {t_ht}}{\ac {tau0}})-\mu }{\sqrt {2}\sigma } \right ) \{end}{align}$

with the error function erfc, which is given in (1.5), the mean value, $\mu$ , and the standard deviation $\sigma$ , of the normally distributed (math image) , and the maximum flatband voltage shift as an additional fitting parameter.

Figure 4.11: Fit of the flatband voltage shift as a function of the time at a given high temperature processing step. The boxes represent the flat band voltage shift after the processing steps $P_2$ (Poly), $P_3$ (ILD), $P_4$ (Anneal), $P_{51}$ and $P_{51}$ (metal contact). Dashed lines represent a fit ac- cording to (4.2), assuming a normally distributed energy barrier . The extracted fitting parameters are given in the inset. The data shows good agreement with an underlying transition mechanism with a mean energy barrier of $\ac {Ebarrier} = \SI {1.3}{\eV }$ and a standard de- viation of $\ac {sigma_nd} = \SI {0.3}{\eV }$ . The extracted dis- tribution of the energy barrier is shown in the bottom plot.

Fig. 4.11 shows a fit of the (math image) data from Fig. 4.3 for the barrier extraction. The boxes represent the flat band voltage shift after the processing steps $P_2$ (Poly), $P_3$ (ILD), $P_4$ (Anneal), $P_{51}$ and $P_{51}$ (metal contact). The dashed lines represent the fit according to (4.2) for the representative process temperatures ranging from 500 °C for $P_2$ and $P_3$ (yellow), to 1100 °C for the metal contact formation $P_{54}$ (red). The fitting parameters are given in the inset. The transition barrier for the mechanism, which results in the observed (math image) , is approximately $\ac {Ebarrier} \approx \SI {1.3}{\eV }$ (Fig. 4.11, bottom), which is in good agreement with proposed energy barriers for the hydrogen release model [48, 58, 132, 133]. A comparison of energy barriers proposed by DFT simulations for various hydrogen related transition events and (math image) extracted in this work from the thermal budget data via the fit in Fig. 4.11 (experimental) is provided in Tab. 4.2.

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Previous: 4.3 Analysis of minority carrier traps using photo-assisted CV Top: 4 Charge accumulation in high temperature processing steps Next: 4.5 Summary

Type
experimental	1.30	0.30
release of $\text {\ac {H}}^0$ from bridging O (DFT)	1.50	0.30
hopping of $\text {\ac {H}}^0$ from bridging O (DFT)	1.55	0.60
hopping of $\text {\ac {H}}^+$ from bridging O (DFT)	1.40	0.75