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Advanced Electrical Characterization of
Charge Trapping in MOS Transistors

zur Erlangung des akademischen Grades
Doktor der technischen Wissenschaften

eingereicht an der
Technische Universität Wien
Fakultät für Elektrotechnik und Informationstechnik

Dipl.-Ing. Bernhard Stampfer
Matr. Nr. 00927191
geboren am 27. Februar 1989 in Hall i.T., Österreich

unter Betreuung von
Univ.Prof. Dipl.-Ing. Dr.techn. Tibor Grasser
Dipl.-Ing. Dr.techn. Michael Waltl

Wien, 28. Oktober 2020





List of Figures

List of Abbreviations

1 Introduction

1.1 History of the Field Effect Transistor

1.2 Reliability Issues in Field Effect Transistors

1.3 This Work

2 Defects in Field Effect Transistors

2.1 Interface Defects

2.2 Oxide Defects

2.2.1 Oxide Defects in SiO2

2.3 Semiconductor Bulk Defects

3 Modeling and Simulation of Defects

3.1 Defect Models for Charge Trapping

3.1.1 The Shockley-Read-Hall Model

3.1.2 The Kirton and Uren Model

3.1.3 The NMP Model

3.1.4 The 4-State NMP Model

3.1.5 The Hydrogen Release Model

3.2 Defect Simulations

3.2.1 Ab-Initio Simulations

3.2.2 Defects in Device Simulation

3.2.3 Defects in Circuit Simulation

3.3 The Defect Centric Model

4 Methods of Defect Characterization

4.1 Electrical Methods based on Channel Conductivity

4.1.1 Random Telegraph Noise (RTN) Measurements

4.1.2 Measure-Stress-Measure (MSM) Methods

4.1.3 Extended Measure-Stress-Measure (eMSM)

4.1.4 On-the-Fly (OTF) Measurement

4.1.5 Hysteresis Measurements

4.2 Electrical Methods based on Defect Charge

4.2.1 Capacitance-Voltage (CV)

4.2.2 Charge Pumping (CP)

4.2.3 Deep-Level Transient Spectroscopy (DLTS)

4.2.4 Direct-Current IV (DCIV)

4.2.5 Thermal Dielectric Relaxation Current (TDRC)

4.3 Physical Characterization Methods

4.3.1 Electron Paramagnetic Resonance (EPR)

4.3.2 X-Ray Photoelectron Spectroscopy (XPS)

4.3.3 Secondary Ion Mass Spectroscopy (SIMS)

4.3.4 Neutron Activation Analysis (NAA)

5 Defect Parameter Extraction from RTN, TDDS, and CV Measurements

5.1 Random Telegraph and TDDS Signals

5.1.1 Histogram and Lag Methods

5.1.2 Edge Detection

5.1.3 Hidden Markov Models

5.1.4 Estimations for Trap Level and Position

5.1.5 Frequency Domain Methods

5.1.6 Time-Dependent Defect Spectroscopy

5.2 Capacitance-Voltage Measurements

5.2.1 Capacitance Methods

5.2.2 Conductance Method

6 Measurements and Results

6.1 Statistical Characterization of Defects Causing RTN in SiO2 Transistors

6.1.1 Devices and Measurements

6.1.2 Parameter Extraction

6.1.3 Step Heights

6.1.4 Energy and Position

6.1.5 Conclusions

6.2 Defect Centric Evaluation of RTN and BTI using pMOS Arrays

6.2.1 Array Chip

6.2.2 Measurements

6.2.3 Parameter Extraction

6.2.4 Simulation and Extrapolation

6.2.5 Bulk and Drain Bias Dependence

6.2.6 Conclusions

6.3 Single Defects in Few-Layer MoS2 Devices

6.3.1 Device and Measurements

6.3.2 Charge Transition Times

6.3.3 Simulation and Results

6.3.4 Conclusions

Summary and Outlook


List of Publications