Defects may also be located within the insulating oxide layer of a device. These oxide defects or border states1 may be created intrinsically during oxide growth or can be introduced by impurities or locally distorted chemical bonds within the oxide. Oxide defects can exchange charges both with the gate and the channel. In general, charge trapping at oxide defects proceeds slower than at interface defects. This is partially due to the fact that electron tunneling has to occur during charge exchange due to the spatial separation of the defect and the respective charge reservoirs in the substrate or in the gate, and partially due to the much larger structural relaxation occurring at the defect site. Due to their position in the insulating oxide, the effective trap level of the oxide defects shifts with the applied gate bias. This leads to a strong gate bias dependence of their charge capture and emission rates. Once an oxide defect is charged, Coulomb interaction between its charge and the carriers in the inversion layer below leads to a reduction of the local carrier density, which affects the mobility in the subthreshold regime and the threshold voltage of the device.
The magnitude of its impact on the channel current depends on its distance to the channel and its position relative to the positions of random dopands which also affect the current flux through the channel . Particularly noteworthy is that in devices which have a small gate area the consequences of charge trapping at oxide defects can lead to a particularly large reduction in the source-drain current, even for single charged defects, due to their effect on the percolation path in the channel. On average, the smaller capacitance of these devices results in each defect having a larger impact on the surface potential, and thus the threshold voltage shift.
While exact calculation of their effect on the channel in a particular device is not possible due to the random distribution of the dopands, the expected impact of trapped oxide charges can be estimated using the charge sheet approximation (see Section 3.2.2). It has to be noted that this approximation cannot replace a detailed statistical analysis of single defects and their impact on the device performance. Typically, the charge sheet approximation underestimated the impact of the defects on the device .
The observed transition times of oxide defects are widely distributed, even more so than the step heights. This is mainly because each defect experiences a slightly different local environment in the amorphous oxide, which strongly affects their properties. In addition, the different positions of the defects in the oxide affect the tunneling probabilities between them and the carrier reservoirs. Thus, oxide defects can on the one hand exhibit very short charge transition times which might affect the momentary behavior the device, but on the other hand very large transition times which can cause long term shifts in the characteristics of the device. Momentarily, they cause increased noise in the drain-source current (RTN) and may lead to hysteresis-like switching behavior. During long term operation, slower defects can become charged, leading to degraded transfer behavior (BTI).
It should be mentioned that the current discussion of charge trapping mainly considers charge exchange between defects and the gate or the conducting channel. However, charge transitions where the defect captures a charge from the gate and emits it into the channel, and vice versa, can also happen. This is possible with intermediate defect to defect transitions. This case is referred to trap-assisted tunneling, and can be observed as leakage current through the insulator. TAT is typically observed as an increase of the gate leakage current with gate bias at low electric fields up to 4MV/cm. At higher electric fields Fowler-Nordheim tunneling starts to dominate and obscures contributions from TAT. Charged defects may further act as an additional barrier for direct tunneling, see Section 4.1.1.
For the electrical characterization of the effects of oxide defects, a number of measurement methods are available, as outlined in Chapter 4. These include also single defect characterization methods, such as RTN and time-dependent defect spectroscopy (TDDS), which can be used to study the trapping behavior of individual defects.
1 Border states refers to near-interface oxide defects which are able to communicate with the semiconductor or the gate 
Density functional theory (DFT) studies on oxide defects in Si/SiOMOSFETs have identified a number of possible defect candidates for SiO [40, 41, 42]. The two most likely candidates—the hydrogen bride and the hydroxyl E’ center—are shown in Figure 2.3. It can be seen that, unlike interface defects, their more complex atomistic structure allows them to exist in more than one configuration with the same net charge. Usually, this is due to one of the silicon atoms transitioning through the triangle spanned by three oxygen atoms to enter a so-called puckered configuration. Due to the amorphous nature of SiO, these defects show a wide variation in their properties, i.e. their trap levels and transition barriers, which leads to the wide variety in observed time constants mentioned above.