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Previous: 5.3 Bias dependence of the recovery Top: 5 Bias dependence of degradation and recovery Next: 5.5 Conclusions - Bias dependence of the shifts
5.4 Bias dependence of the 
extraction
The occupancy of interface states can follow changes in 
quasi instantaneously (SRH theory), with the
fastest response times being in the pico- and nano-second range and the slowest response times for traps located at midgap in the millisecond regime [152], both outside our measurement window. Oxide traps, on the other hand, are
expected to require a longer time interval to restore equilibrium with the silicon substrate since a large quantum mechanical barrier has to be overcome by elastic or inelastic tunneling. Also, charging and discharging is likely to be
accompanied by structural relaxation [110, 102, 153]. Generally this means, that if the Fermi level is changed abruptly (for example when we switch the gate bias from stress level to 
) a new equilibrium condition is generated.
Assuming an elastic tunneling process, stress-induced oxide traps within the energy range 
would tend
to become or stay positively charged while traps below 
would rather be neutralized. Such a
‘switching’ behavior of oxide traps was already reported for 
centers in MOS structures after irradiation [103, 101].
In Fig. 5.4, we generate such new equilibrium conditions by switching the gate bias during recovery of the NMOS and PMOS devices in a defined
way between weak and deep inversion: after 10
of recovery at 
(1), we change the gate bias for
another 100 towards weaker inversion (
) (2). This moves the Fermi
level immediately from the band edges closer toward midgap, cf. Fig. 5.4. A second gate bias switch from (2) to 
(3) for another 1,000 moves the Fermi level even closer to midgap. The last recovery cycle was
performed again at (1) and lasted for 10,000.
Figure 5.4: 
shift during recovery at different gate
biases for the PMOS and the NMOS device. On the left hand side, the Fermi level position is illustrated for the individual gate biases. As the gate voltage drives the Fermi levels closer toward midgap (1) 
(2) (3), the difference in the shift between the PMOS and the NMOS
device decreases. After switching the gate bias from depletion back toward inversion (3) (1), transients emerge as tails in the recovery curves.
According to the data shown in Fig. 5.4, a Fermi level variation toward accumulation lowers the total shift for both the NMOS and PMOS transistor.
Consequently, the difference in net positive charge between NMOS and PMOS devices is reduced. Recalling the previous discussion, this is because the energy interval of electrically active charge is narrower as we bias both devices
closer toward midgap. After the last bias switch from (3) back to (3), we observe a huge step in
the shift indicating that previously neutralized
defects can be recharged again. This behavior is typically attributed to interface states and not fully appreciated for oxide defects. Furthermore, these charges do not react instantaneously to the bias switch. Instead, moderately fast
transients are observed (tails in the recovery curve) after the bias switch indicating a relatively slow (i.e. time constants in the range of several thousand seconds) dynamic carrier exchange process which may be due to inelastic
tunneling between oxide defects and the silicon substrate. SRH recombination of interface states or elastic tunneling would be definitely too fast to produce recovery tails within our experimental time resolution.
Previous: 5.3 Bias dependence of the recovery Top: 5 Bias dependence of degradation and recovery Next: 5.5 Conclusions - Bias dependence of the shifts