5.5 Conclusions – Bias dependence of the shifts

Based on the upper key experiments performed on identically stressed NMOS and PMOS devices, one may draw the following conclusions on bias dependence of the measured shifts and its recovery:

• 1. One must use separate sets of devices and short CP intervals for reliable and investigations during constant bias recovery. These conclusions are drawn from the findings that and recovery are influenced considerably by gate pulsing.

• 2. Interface states are quasi-permanent as long as the gate bias is constant between two short CP measurements, cf. Fig. 5.3 (b). Consequently, they cannot account for the threshold voltage recovery observed at constant gate bias.

• 3. During recovery performed at positive or negative gate bias, both NMOS and PMOS devices relax in the positive direction, cf. Fig. 5.3 (a). This indicates that in both cases net positive charge is lost. The recovery rate, however, is found to be larger in the NMOS device (biased at a positive gate voltage). This is consistent with previous observations and with the idea of positive oxide trap neutralization via electron capture, the latter being much more efficient at positive gate biases (majority of electrons at the interface).

• 4. The net charge at the end of a long recovery phase is positive for the PMOS and negative for the NMOS device. Indeed, the shift of the NMOS device after 10,000 recovery at +1.1 equals approximately its interface state contribution (measured via CP). Conversely, 10,000 recovery at -1.1 (PMOS) leaves a considerable amount of remaining positive oxide charge, consistent with [78, 27]. The explanation agreeing with the bulk of literature on oxide and interface traps is as follows: Oxide traps ( centers) are donor-like while interface states are amphoteric [50, 89]. Consequently, the positive shift of the NMOS device after recovery must originate from a dominance of negative interface state charge.

• 5. The observed difference of 30 between the total shift of the NMOS and PMOS device visible in Fig. 5.3 (a) cannot be explained by interface charge alone, cf. Fig. 5.3 (b). The related fraction (), which is no more than 15, is only about half of the total shift difference.

• 6. After NBTI significantly more (equivalent another 15) positive oxide charge remains visible on PMOS device than on the NMOS device, although the stress field and temperature have been identical for both devices.

• 7. The difference in the shift can be reduced by biasing both transistors closer toward accumulation, the Fermi levels approaching midgap, cf. Fig. 5.4. This suggests a certain amount of defects to be rechargeable, which is accepted for interface states but not fully appreciated for oxide defects. As opposed to interface states (which align their charge state very fast according to SRH theory) oxide charges do not react instantaneously to the bias switch, making them observable as slow tails in the recovery curves within our experimental time resolution.