Contributions

This work presents the following original contributions:

• A review of the gate work-function engineering in submicrometer CMOS technologies has been given (Section 2.1). The redistribution and the activation of dopants in the implanted gates has been reviewed.

• An analytical one-dimensional model of the gate/oxide/silicon structure has been given in Section 2.2 and Appendix A. The model properly accounts for the heavy-doping effects in the gate: the position-dependent band-gap-narrowing and the degeneracy. The impact of the active dopant concentration in the gate near the oxide interface and the surface charge at the gate/oxide interface on the flat-band potential, the threshold voltage, the inversion-layer charge and the gate capacitance has been analytically modeled and quantitatively evaluated in Section 2.2.3.

• A two-dimensional numerical model of the gate-depletion effect has been developed and applied in order to study the degradation of the device performances with a further scaling down of MOSFET dimensions and supply voltages (Section 2.4.1). Supported by the numerical calculations we have explained the differences in the degradation of the current, mobility and inversion-layer charge in the linear and the saturation region by means of the analytical MOSFET theory in Section 2.4.2.

• Disagreements between the assumed physical gate-model and the experimental quasi-static gate capacitance have been systematically observed (Section 2.3.1). Several physical phenomena in the gate which are responsible for the disagreements have been discussed in Section 2.3.2. They are the quantum-mechanical effects in the accumulation layers, the interface traps at the gate/oxide interface, the traps at the grain boundaries laying closely to the gate/oxide interface, the nonuniform dopant distribution close to the interface, the micro-fluctuations in the gate doping and the heavy-doping effects in very shallow space-charge regions like an increased disorder leading to very deep band tails.

• A comprehensive review of the state of the art in the charge-pumping measurement techniques has been given in Sections 3.1 and 3.1.1. The restrictions of the analytical approaches to model the charge-pumping effect have been pointed out.

• A comprehensive review of other techniques which can be employed to study the interface traps in small MOSFETs has been presented (Section 3.1.2).

• The trap-dynamics equations have been coupled with the two-dimensional transient semiconductor equations on a rigorous selfconsistent footing and implemented in an MOSFET numerical model (Section 3.2). Interface and bulk traps arbitrarily distributed in both, energy and position space are allowed in the model. Even in the presence of very high trap densities in devices, the developed algorithms have yielded a stable and fast convergency of the iterative process. The time-discretization error in solving the trap equations in the capture and the emission modes has been evaluated by analytical means and by comparison with the numerical model (Appendix B). Rules to control this error are proposed.

• An approximate analytical model of the complete characteristics, i.e. charge-pumping current versus gate bottom level, has been presented in Section 3.3.1. The processes occurring during the bottom and top levels and the rise and fall edges of the gate pulses have been carefully considered. The accuracy and limitations of this phenomenological model have been examined by comparison with the accurate numerical model.

• Different definitions of the charge-pumping threshold voltage and the charge-pumping flat-band potential have been introduced (Section 3.3.1). We distinguish between the charge-pumping threshold voltage which determines the interface area completely filled during the gate top level, the gate bias at the transition between the steady-state and the non-steady-state emission and the gate bias which determines the break of the emission process by the capture of the carriers of opposite type. Neither of these voltages correspond to the device threshold voltage and the device flat-band potential, but they depend remarkably on the time intervals in the gate waveform.

• The accuracy of the expression for the charge-pumping current, when the current is solely determined by the emission levels, has been examined on a broad time scale or energy range. A correction of the present formula for the emission level has been derived, which results from a finite width of the transition region and a nonsymmetry in the non-steady-state occupancy function (Section 3.3.2).

• A systematic error in the present expression used to extract the energy distribution of the trap density by applying the trapezoidal gate pulses has been detected and explained in Section 3.3.2. The error is a consequence of the non-proportionality between the emission times and duration of the pulse edges.

• By employing the two-dimensional transient model of the charge-pumping experiment the geometric current component has been fully clarified for the first time in Section 3.4. Two independent mechanisms generate the geometric component. One of them, the transfer of one part of the minority carriers which are emitted from the interface states towards the bulk, but not towards the junctions as usually assumed, is directly responsible for a nonvanishing geometric component at very long turn-off times. It has been found that the novel effect modulates the falling edge of the characteristics charge-pumping current versus gate bottom level. Much more important is the fact that this effect can exhibit a strong impact on the characteristics in the capture mode of the measurements with the three-level waveform.

• The changes in the characteristics charge-pumping current against gate bottom level after hot-carrier stress have been studied by applying the numerical model (Section 3.5.1). It has been determined that the location of the stress-generated traps has a much larger impact on the characteristics than the nature of traps (donor-like or acceptor-like) and the amount of traps. Different stress experiments have been simulated, which are due to the electron capturing on the trapped holes and on the neutral traps generated in the hole injection. We have found that, in some cases but not in general, the rising edge and especially, the deep-tail region can provide information on the relative position of the localized interface traps against the trapped charge, the amount of the trapped holes and the generation of the neutral traps.

• It has been discovered that a surface charge localized in a finite width induces the surface-potential perturbation and the shift in different gate-bias terminal characteristics which are both smaller than those induced by a uniform charge; Section 3.5.1 and Appendix F. An analytical model of the effect has been derived in Appendix F by solving the Laplace problem in the gate (metal plate)/oxide/depletion region/semiconductor (metal plate) structure in the presence of a localized surface charge. A connection between the local band-bending and the gate-bias shift has been derived. The analytical model has been confirmed by comparison with the numerical solution. The influence of the depletion-region width, the width of the charge sheet and the screening effect due to possible interface inversion and accumulation on the local band-bending and the gate-bias shift has been explained in detail.

• The extraction of the spatial distribution of the trap density along the oxide/silicon interface has been systematically considered in Section 3.5.2 and Appendix G. We have studied both cases, a slowly varying trap density which is symmetrically distributed at the source and drain sides (virgin devices) and the damaged region strongly localized at the drain side in the stressed devices. An error in the application of some present charge-pumping techniques has been found, which occurs due to neglecting the changes in the emission levels for all traps in the device during the course of experiment. The error has been quantitatively studied. It depends on the channel length and can even be larger than the desired component in the measurements. The present methods have been improved to account for this parasitic effect. A simple experimental method has been proposed which does not suffer from this effect, as has also been confirmed by the numerical calculation. The study in Section 3.5.2 is strongly based on the rigorous numerical modeling of the charge-pumping experiment.

• A technique for the extraction of the spatial distribution of fixed oxide charge by the charge-pumping technique has been proposed in Appendix G. This method is, however, applicable only when interface states are generated in a negligible amount in stress.

• The characteristics charge-pumping current against gate bottom level of LDD MOSFETs differ qualitatively from the characteristics of conventional MOSFETs. The differences have been completely explained in Section 3.5.3. An analytical model of the gate-corner/LDD-region electrical-field fringing has been derived by solving the Laplace problem in the oxide employing the conformal transformations in Appendix E. We have observed, however, that the exact solution to the fringing problem can only be obtained by a two-dimensional numerical approach, because of a nonvanishing lateral field self-induced in the semiconductor near the gate edge. The analytical model has been applied to explain the tail-region in the rising edge of the charge-pumping characteristics of LDD devices.

• The degradation of -channel LDD MOSFETs under the stress at maximal substrate current has been studied in Section 3.5.4. The spatial trap distributions have been extracted from the charge-pumping characteristics measured at different moments while stressing. Note that the charge-pumping characteristics, i.e. the current versus gate bottom level, have been numerically calculated assuming the extracted distributions as input and compared with the experimental results. An excellent agreement has been obtained, with exception of the deep-tail region. For the analyzed devices the traps are generated in a small amount in the whole gate/LDD overlap region, but many more traps are produced under the spacer-oxide, probably due to the injection from the LDD field-peak. The evolution of the drain-current degradation has been simulated assuming the extracted traps as input and no saturation on the double log-scale has been found for the LDD devices considered.

• The consequences of the band-to-band tunneling effect in MOSFETs are reviewed, with regard to the static characteristics, the reliability issue and the design of new devices.

• A model of band-to-band tunneling has been developed and implemented in an MOSFET numerical analyzer. The tunneling path is considered fully in two-dimensions and the linear variations of the electric field along the individual tunneling paths have been taken into account. The study shows that the potential and field distributions are strongly two-dimensional in the gate/drain and gate/source overlap regions where the tunneling leakage current is generated.

• A model for the direct tunneling rate in a linearly variable field is derived. It is based on the WKBJ approximation and the two -perturbed band dispersion relation.

Several problems have been posed in the text and ideas to solve them, which should result in a continuation of the work on these topics. Finally, we would like to point out that the areas of the MOS device physics and modeling are very far from the point of being well understood and worked over. Moreover, we feel that with approaching the deep submicrometer arena (from quarter- to gate length) the problems are becoming complex and that their solution will necessarily involve much advanced physical models and mathematical approaches than the ones we commonly apply at the present state of the art.