Projects Details
Fluorides for 2D Next-Generation Nanoelectronics | |
Project Number | 101021351 F2GO |
Principal Investigator | Tibor Grasser |
Scientists/Scholars | Mauro Borghi Zoltan Hajnal Nils Petter Jorstad Oliver Hartwig Ananya Karmakar Manfred Katterbauer Mahdi Pourfath Alexandros Provias Seyedmahdi Sattari Igor Sokolovic Diana Pop Dominic Waldhör Bibhas Manna |
Approval Date | 5. April 2022 |
Start of Project | 31. August 2022 |
Additional Information |
Abstract |
The IRDS roadmap considers two-dimensional (2D) materials a promising option for scaling electronic devices down to atomic dimensions. While there has been a lot of progress regarding 2D semiconductors, all electronic devices require suitable insulators as well. Although a major show-stopper, insulators have received far less attention and their is no clear roadmap as to which insulators can be used for ultimately scaled nanoelectronics. We have recently demonstrated back-gated 2D FETs using ultrathin calcium fluoride (CaF2) as an insulator. Based on these promising results, it appears that fluorides, which are ionic crystals with often very wide bandgaps, can efficiently address the major challenges: (i) Although a relatively exotic material, its growth is considerably better established than that of any 2D material. (ii) CaF2 can be epitaxially grown layer-by-layer on silicon substrates and likely also on 2D semiconductors. As their F-terminated inert surface supports van der Waals epitaxy of 2D materials, they could be the missing link between 3D substrates and 2D semiconductors. (iii) The low-defectivity of the inert CaF2 surface will significantly improve device performance and stability. Thereby, fluorides will allow novel 2D devices to make the leap from promising concepts to highly performant and stable real devices. F2GO will explore the potential of fluorides as a key enabler for 2D nanoelectronics by exploring device architectures which were previously impossible to fabricate with sufficient performance due to inadequate insulators. These will include steep slope devices for CMOS logic (Cold Source FETs) at the ultimate scaling limit and (ii) ultra-scaled non-volatile memory devices (Flash and TRAM).
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