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Modeling of Defect Related Reliability Phenomena
in SiC Power-MOSFETs

zur Erlangung des akademischen Grades
Doktor der technischen Wissenschaften

eingereicht and der
Technische Universität Wien
Fakultät für Elektrotechnik und Informationstechnik

Dipl.-Ing. Christian Schleich
Matr. Nr. 1325958
geboren am 30. Mai 1987 in Ried i.I., Österreich

unter Betreuung von
Univ.Prof. Dipl.-Ing. Dr.techn. Tibor Grasser
Assistant Prof. Dipl.-Ing. Dr.techn. Michael Waltl

Wien, August 2022




List of Abbreviations

1 Introduction

1.1 MOSFETs in Power Conversion Applications

1.1.1 Materials

1.1.2 From MOSFETs to SiC Power Switches

1.1.3 Silicon Carbide Material Properties

1.1.4 Fabrication and Properties of SiC MOSFETs

1.2 Reliability of MOSFETs

1.2.1 Bias Temperature Instabilities

1.2.2 Gate Leakage Currents and Oxide Breakdown

1.2.3 Hot Carrier Degradation

1.3 State of the Art, Motivation and Outline

2 SiC MOSFET Reliability Characterization

2.1 Electrical Characterization Methods

2.1.1 Transfer Characteristics

2.1.2 Capacitance Voltage Measurements

2.1.3 Measure-Stress-Measure Schemes

2.1.4 Single Charge Transfer Measurements

2.2 Peculiarities of SiC Metal Oxide Semiconductor Field-Effect Transistor (MOSFET) Characterization

2.3 Measurement Setups

2.4 Magnetic Resonance Methods

2.5 Summary

3 Defects in SiC Field Effect Transistors

3.1 Defects in Bulk Silicon Dioxide

3.2 Defects at the Silicon Carbide / Silicon Dioxide Interface

3.3 The Role of Hydrogen

3.4 Nitrogen Related Defects

3.5 Summary

4 Modeling of Charge Transfer Reactions

4.1 From State Diagrams to the Master Equation

4.2 The Shockley-Read-Hall Model

4.3 Non-Radiative Multi-Phonon Theory

4.4 Two-State NMP Model for Trap-Trap Interaction

4.4.1 Parameter Transformation

4.4.2 Limitations

4.5 Efficient Framework for MOS Gate Leakage Currents

4.5.1 Tsu-Esaki Model

4.5.2 Charge Hopping Model

4.6 Compact Physics Framework (Comphy)

4.6.1 Electrostatic Quantities

4.6.2 Threshold Voltage Shift

4.6.3 Gate Leakage Current Computation

4.7 The Multi-TAT Regime

4.8 Effective Single Defect Decomposition

4.9 Summary

5 Measurements, Simulations and Results

5.1 Bias Temperature Instabilities in SiC MOSFETs

5.1.1 Lateral Test Structures

5.1.2 Comparison of different DMOS Technologies

5.1.3 Defects Parameters

5.1.4 Temperature Activation of Electron Emission

5.1.5 Capture and Emission Time Maps

5.1.6 Reliable Prediction of \( \Delta V \)th

5.1.7 Summary

5.2 Trap-Assisted Tunneling Currents

5.2.1 Tunnel Currents in SiC MOSCAPs

5.2.2 Tunnel Currents in TZT Structures

5.2.3 The Role of Polarons

5.2.4 Model Verification

5.2.5 Summary

5.3 Conclusions

6 Summary and Outlook

6.1 Summary

6.2 Outlook


List of Publications