Modeling of Defect Related Reliability Phenomena
in SiC Power-MOSFETs
5.2 Trap-Assisted Tunneling Currents
The results within this section have been previously published in [CSJ2] and [CSJ3].
As outlined in Chapter 1, time-zero leakage currents through dielectrics in MOSFETs or storage capacitors, as well as through back-end of line inter-layer insulators can
increase the device power consumption and accelerate the aging of the dielectric. In defective dielectrics, these currents can be enhanced already at low to medium field strengths due to trap-assisted conduction. A detailed
understanding of these TAT currents and the properties of the defects that act as transition centers is required in order to both set countermeasures, i.e. optimized material selection and processing, and to include the effects to
realistically replicate the device behavior in simulations. Therefore, this section aims to make use of the developed NMP based TAT model from Chapter 4 to explain TAT in SiC MOS technologies reported in previous works [115, 116]. The employed model is further verified by simulation of well
explored currents in TiN/ZrO2/TiN (TZT) structures, as reported also in [265, 107], in detail. The obtained defect parameters to replicate the measured TAT currents can interestingly both be attributed to polarons in the two
binary oxides, i.e. SiO2 and ZrO2 via comparison to DFT calculations. Finally, the modeling approach is analyzed in terms of the impact of multi-TAT, parameter variation, stochastic properties and
5.2.1 Tunnel Currents in SiC MOSCAPs
The temperature activated tunneling currents in SiC MOSCAPs reported by Moens et. al  have been suspected to originate from a
trap-assisted conduction due to oxide defects in the vicinity of the interface between the SiC substrate and the thermally grown and 53 nm thick SiO2 serving as gate oxide. With a moderate doping
concentration of = 1 × 1016/cm3 and an n-doped poly-Si gate contact, these devices are expected to show similar leakage currents as commercially available MOSFETs. The gate currents have been measured over a wide temperature range of = 25 °C to 245 °C for oxide field strengths of up to 9 MV/cm at positive gate bias. Increased temperature activation in the regime of = 5 MV/cm to 8 MV/cm has been observed, when compared to FN tunneling with negligible activation which dominates the measured currents at higher fields. To calculate the TAT currents, the device reliability simulator Comphy has been set up by using the same material parameters for the channel substrate
as in Table 5.1. A single defect band has been used, with parameters that have been optimized to reproduce the reported measurement data. A
least square method based on a Nelder-Mead algorithm as implemented in the scipy package of Python has been used for this purpose. Figure 5.21 shows the simulation results compared to the measured characteristics with excellent agreement for both, the TAT regime, as computed by
the proposed TAT model, as well as the FN regime, calculated by the Tsu-Esaki model. Note that the shown simulations have been performed with = 1200 defects for = 100 slices, and the resulting current densities refer to the average values over slices at each . Most importantly, the temperature activation is accurately captured by the TAT calculation as can be seen in the bottom panel of Figure 5.21.
By analyzing the simulation, the hypothesis of Moens et. al of electron capture from the channel at defects within the first few nm of the oxide and further emission to the insulator conduction band can be confirmed.
Figure 5.22 shows a spatial resolution of the defects´ current conduction contribution at the intermediate = 135 °C that is concentrated within 1 nm to 3 nm distance from the channel. For lower gate bias, the conducting defects are located further away from the interface. Due to the effective trap
level shift with increasing field strengths, the distribution of conducting traps shifts towards the interface. Above about VG = 45 V, the total current is dominated by direct band to band tunneling, i.e. FN
conduction. It should be noted that the defect band has been sampled up to a maximum distance of 3 nm. This distance does not indicate an abrupt stop of the defect distribution but simply reflects the fact that the set-in of
the measured current starts at about VG = 25 V due to the limited current resolution of available measurement tools. This set-in point, hence, defines the maximum distance, at which the current conduction is
observed, and thus sampling further into the oxide has no impact on the computed currents within the relevant bias range. The electron drift within the insulator, upon emission from the defect to the oxide conduction band, can be
considered instantaneous within each simulation time step. This assumption is justified, as typical drift velocities in SiO2 exceed drift velocities of at 1 MV/cm  and therefore a drift time of less than 1 ps in a
100 nm oxide can be expected. Such a drift time is orders of magnitude faster than time-scales that can be measured by ultra-fast current measurement setups with resolutions in the µs regime .
Furthermore, the simulated currents are in steady-state, i.e. the electron is captured from the channel at the defect site and instantaneously emitted to the insulator conduction band within one time-step. This is caused by capture
and emission times which are orders of magnitude smaller than the selected time steps. For example, at and , the capture time from the channel as well as the emission time to the gate are in the range of 1 × 10−4 s which is significantly smaller than the time step of 1 s. Additionally, no charge builds up in the TAT defect band with defect occupations 1 × 10−4 for all , which translates to minor threshold voltage shifts ∆Vth at all time steps, as shown in Figure 5.23. With such low ∆Vth, which is about a factor of 100 smaller than
∆Vth observed in SiC MOSFETs, the TAT defect band can be considered to have no impact on charge trapping, i.e. no contribution to BTI within the time regime of ms to s is expected.
7.6 × 1018/cm3
Table 5.7: The defect parameters of the two-state NMP model as obtained for technology 1 from Comphy (TAT) and DFT (polarons) are listed. Note that the thermodynamic trap-levels ET are referred to the SiC mid-gap level.
* = 1.35 recalculated with the ER -R correlation (5.1) for R = 1 as denoted in Figure 5.26.
In Table 5.7, the extracted parameters needed to describe the observed TAT currents are listed. Contrary to defects that are typically responsible
for charge trapping, the distance of the thermodynamic trap level to the channel conduction band edge is relatively large for this trap band. At the same time low relaxation energies are obtained in comparison to oxide defects that
are suspected to cause BTI in technologies employing SiO2 layers [77, 173, 172].
Figure 5.24: The reported tunneling currents on MOSCAPs  employing thermally grown 53 nm
thick oxide (circles) are compared to the measurement data extracted from poly-Si/SiO2/SiC MOSFETs with a deposited 70 nm thick oxide (triangles) (left). The simulations (lines) for both structures are
performed with the same defect parameters (Table 5.7) and agree with the measured IG (VG ) characteristics. As in the case of the MOSCAPs, c.f.
Figure 5.21, the thermal activation of TAT as shown in the FN plots (right) is well captured by the simulation.(taken from [
As the oxide of the MOSCAPs reported in  is thermally grown silica, it potentially exhibits a different stoichiometric composition compared to a
deposited SiO2 layer, which is used in trench MOSFET fabrication. Such a different composition could potentially be introduced from residues of the TEOS  based precursor. Also, different structural properties of the oxide due to altered process temperatures can be expected. To investigate the impact of a
different oxide deposition process on the oxide defect band, the gate leakage measurements have been repeated on lateral MOSFETs employing a 70 nm thick SiO2 layer, which was passivated after CVD oxide
deposition in NO ambient. Note, that the different surface termination of the a-face on trench MOSFETs compared to the Si-face on lateral devices could modify the band alignments between SiC and SiO2  and therefore an investigation of leakage currents in trench MOSFETs was deliberately avoided for this study. The leakage currents of the
MOSFETs with gate area WL = 1.95 mm2 have been measured with an Agilent B1500 Parameter Analyzer and a Keithley 708B Switching Matrix Mainframe by sweeping the gate bias from 20 V to 60 V at a rate
of 33 mV/s with a step size of 10 mV at a constant drain bias of VD= 0.1 V and grounded source terminal for two temperatures = 303 K and 473 K. The resulting sweeps are shown in Figure 5.24 together with those of the MOSCAPs as a reference.
Despite the modified gate stack configuration, the simulations performed with the same defect parameters can accurately reproduce the gate leakage characteristics of the n-MOSFETs with the slightly thicker oxide. In this way, the
temperature activation in the TAT and the FN regime show perfect agreement, as can be seen from the FN plots. Thus, it can be concluded that deposited and thermally grown oxides show similar time-zero gate leakage
performance in the positive bias regime.
The hypothesis of a narrow spatial defect distribution in SiC/SiO2 MOSFETs that enables the leakage current has already been presented earlier by Chbili et. al. The simulations performed in this work agree with their observation and confirm the suggestion of a
“sweet spot" for conduction. Thus, a certain spatial position and a thermodynamic trap-level ET are required to enable leakage currents in the tens of nm thick oxide. Additionally, in the work of Fiorenza et. al, a similar mechanism is reported for NBTI, however, due to the transient decay of the gate currents shown in their work, these currents are more
likely caused by charge trapping.
At higher oxide fields above 8 MV/cm, impact ionization is reported to play a crucial role in SiO2  and should be
considered in an expanded transient modeling approach. Nonetheless, the scope of the herein presented model is limited to time-zero characterization, thus also neglecting time dependent SILC, which may stem from defect
generation, or reconfiguration of oxide defects which can open up a leakage path . However, these effects are considered to be negligible
within the short time ranges in which the gate bias sweeps are performed on pristine devices.
5.2.2 Tunnel Currents in TZT Structures
For further validation of the proposed TAT model, a well explored dielectric leakage mechanism as observed in TiN/ZrO2/TiN (TZT) capacitors, is investigated. These structures have been established in DRAMs as
storage capacitors . Besides the advantages that lower supply voltages can be used by employing the high-k dielectric, while conserving the
necessary electric field to store and erase charges at physically thicker layers compared to low-k dielectrics, large thermally activated leakage currents have been reported in TZT stacks at low and medium field strengths [265, 268]. These detrimental leakage currents limit further down-scaling of
In order to explain the different slopes and thermal activation of the currents in the low and medium field strengths regimes, Jegert et. al used a kinetic Monte Carlo approach to explain the TAT currents . This modeling approach based on a Gillespie algorithm 
has the advantage of straight forward acquisition of a solution of charge transfer reactions using a stochastic probability density function that is equivalent to solving the Master equation deterministically, as in the herein presented
approach. However, it comes at the cost of an inexact time sampling for reactions that show time constants distributed over many decades. This might be the reason why their modeling fails to explain the low field transient
currents and only captures one component of the TAT mechanism. Additionally, elastic tunneling has been used for defect to defect charge transfer and inelastic tunneling for the reactions between defects and reservoirs, which
seems non-physical, see discussion in Chapter 4. For the verification of the multi-TAT model, data of capacitors with 8 nm thick
ZrO2 contacted with TiN electrodes with an area of about 1 × 10−4 cm2 , as reported in , has been used as a reference, which is equivalent to the data presented in . As shown in Figure 5.25 the multi-TAT model described in
Chapter 4 can explain both the shallow sloped currents at VG 1.7 V, as well as the steeper slopes in the tunnel current for VG 1.7 V. At oxide fields above 3.5 MV/cm (VG 2.5 V) the onset of oxide breakthrough can be seen, which explains the increasing slopes of the leakage current, compared to decreasing slopes of TAT currents in the simulation.
3 × 1019/cm3
charge trapping band
6 × 1019/cm3
Table 5.8: The NMP parameters extracted by the TAT model to explain the leakage currents of TZT capacitors compared to those obtained from DFT calculations are given. Note that the thermodynamic trap levels ET are
referred to the TiN work function level.
In order to explain the measurement data, two defect bands are required with parameters shown in Table 5.8. The lower slope currents at
low field strengths are thereby explained by the “trapping" band, with mean ET = 0.35 eV above the TiN conduction band edge, and mean relaxation energies of ER = 2.6 eV. These relatively large relaxation
energies for defects deep in the ZrO2 band gap in combination with aligned thermodynamic trap levels to the electrode conduction band edge leads to a transient charge trapping current which decays with increasing
time at a constant bias level. The relaxation energies are too large to allow for a conduction towards the second TiN contact and defect levels are too deep to emit electrons to the ZrO2 conduction band. Thus, the
Shockley-Ramo current for charge capture is measured. These observations are fully consistent with the measurement data reported in [240, 265] as “transient" or “relaxation" currents. For the steeper slope
currents at medium field strenghts, the same conduction mechanism is responsible that has been observed for the SiC MOSCAPs and MOSFETs. The TAT defect band in between the conduction band edges of the electrode and
oxide with relatively low relaxation energies enables a steady-state TAT current, with electrons captured at the defects and instantaneously, i.e. within the time scales defined by the sweep rate of 50 mV/s, emitted to the
ZrO2 conduction band.
5.2.3 The Role of Polarons
The DFT calculations presented within this section were performed by Dominic Waldhoer.
When taking a closer look at the NMP defect parameters in Table 5.7 and Table 5.8 of the defects that are necessary to replicate the measured leakage currents in both technologies, two common features can be observed.
First, the thermodynamic trap level ET lies in between the conduction bands of the reservoir electrode or semiconductor channel, respectively, and the insulator. Second, the relaxation energies which mainly impact the charge
trapping kinetics are small when compared to common oxide defect structures considered responsible for charge trapping [77, 173, 172], whose relaxation energies are in the range of
1.5 eV to 4 eV, c.f. also Section 5.1. Considering these prerequisites, a class of defects widely studied by ab-initio methods in
binary oxides [270, 271, 272, 222, 177, 273, 179], the so-called polaron has to be taken into account as a potential defect structure candidate. In a-SiO2 polarons are associated with
electrons trapped at an elongated O-Si-O bond. The self-trapped electron, as the polaron is also named in SiO2, fullfills the requirement of a small relaxation energy with ER = 0.72 eV to 1.7 eV as for
instance calculated in . However, in the work of El-Sayed et. al only a small number of these elongated O-Si-O bonds have been
calculated. Therefore, an extension towards a larger statistical data set is required to capture the distributed defect properties in amorphous silica as discussed in [CSJ3] and also in the following. For this purpose, by applying a melt-and-quench technique within a molecular dynamics (MD) calculation including
216 atoms in a 3x3x3 supercell of -crystobalite, models of a-SiO2 structures have been prepared. The exact procedure and parameters used for the MD calculations employing Reax-FF force fields to model the interactions between the
individual atomic species are explained in detail in . A further relaxation of the atomic positions and
cell vectors of the prepared sample structures was then calculated within DFT  to reduce the atomic forces below a threshold of
25 meV/Å and the internal stress below 0.01 GPa. For this, a Gaussian Plane wave method within the CP2K code  has been
used and to expand the electron density and wavefunctions a double- Goedecker-Teter-Hutter  basis set has been employed. For an accurate calculation
of the electronic structure, the non-local hybrid exchange-correlation (XD) potential PBE0TCLRC  has been used. These calculations resulted in a single-particle bandgap of
8.1 eV in good agreement with the experimentally observed gap in thin SiO2 films of about 8.9 eV . To
reduce the high computational costs for the accurate calculation of the Hartree-Fock exchange integral, it has been approximated by a small auxiliary basis set within the Auxiliary Density Matrix method .
The resulting disordered atomic structures contain partially-localized empty states in the vicinity to the conduction band edge of SiO2, as shown in Figure 5.26 (top left). Upon electron injection these wavefunctions collapse onto a single Si atom  which together with a structural relaxation results in the localized polaron state, shown in the right panel of Figure 5.26. The energy that is dissipated to the energy reservoir, i.e. the surrounding thermal bath, during this relaxation process directly gives the
relaxation energy , while the thermodynamic trap levels ET have been derived by employing the methodology presented in . As spurious electrostatic self-interaction occurs in charged cells with periodic boundaries, a Makov-Payne correction scheme  has been used for its compensation. Both statistical distributions of the charge transfer parameters (ET , ER ) are shown in the bottom panel of
Figure 5.26 together with the bands used in Comphy and listed in Table 5.7. A reasonably good agreement between the ET used for the TAT calculation and the DFT calculations is observed. As for the relaxation energy,
due to a slightly higher value of the curvature ratio of = 1.35, a transformation due to the parameter correlation of the relaxation energies with curvature ratios as explained in Section 4.8 is required for comparison with the two-state NMP parameters. The correlation is given by [CSJ8]:
and when applied it indeed results in an excellent agreement between and . Thus, polarons are considered to be a likely defect candidate responsible for the observed TAT currents in SiO2.
In order to create a-ZrO2 models by MD simulations, a similar method as for the SiO2 models was applied by using Buckingham-like force fields that have been parameterized for high-k ZrHfO alloys  from 3 x 3 x 3 cubic ZrO2 cells. Varying quench rates in the range of
5 K/ps to 20 K/ps have been employed to achieve different grades of crystallinity throughout the samples, as ZrO2 is known to partially recrystallize during device processing . In the resulting structures shown in Figure 5.27, the crystal
planes can be clearly identified, however, with local spatial distortions of the atoms. For the DFT calculation, the same parameters and models have been used as described above for the SiO2 models. Thereby, a
bandgap of 5.9 eV was computed which shows excellent agreement to values reported from experiments, e.g. = 5.8 eV . Local oxygen deficiencies lead to a precursor site for polarons,
shown in Figure 5.27 (top left). Here, electrons can localize to form a polaron state as can be seen in the right panel. These observations agree well
with those obtained from other non-glass forming oxides [179, 284]. When comparing the statistical distribution of the charge transfer parameters calculated within DFT as in the case of SiO2 to the TAT
band parameters for the TZT structures used in Comphy, the good agreement is evident.
Since both structures investigated herein employ binary oxides and show a strong indication for a polaron-assisted leakage current, the question arises, whether this mechanism can generally be expected in gate stacks or
capacitors employing SiO2, ZrO2 or the structurally very similar HfO2. One prerequisite for a defect band to contribute to an electron TAT current is that the thermodynamic trap level lies in
between the conduction bands of the electrode and the insulator or, for a hole TAT current in between the valence bands. In the following the conditions for an electron TAT current will be described while similar considerations
apply to a hole TAT current. This energetic alignment of the trap-level is observed in non-crystalline materials, as shown for the a-ZrO2 defect level distribution as obtained from DFT in Figure 5.28 (left). By analyzing a few samples of the model that have fully recrystallized, these show a defect band with very narrow distribution in
the vicinity of the insulator conduction band, as shown in the same figure for monoclinic ZrO2 (m-ZrO2). In general, the polaron band is expected to be a bulk property of the oxides and therefore it is
likely that it shows a uniform defect density. In contrast, the density of interfacial defects typically decays towards the bulk oxide. With the preconditions of an amorphous dielectric layer in the material system and a homogeneous
density of such a bulk defect band, some approximate numbers shall be given to define an energetic and spatial range where polarons can play a role to enable TAT currents. As for the energetic alignment of the trap level, its
distance to the insulator conduction band needs to be aligned to the conduction band edge, i.e. in a first order approximation, the Fermi-Level. Furthermore, the defect needs to be located at a distance of the electrode, as schematically shown in Figure 5.28. From this, with the first energetic precondition is obtained as
Both the distance for tunneling to the defect as well as the distance for tunneling to the insulator from the defect need to be sufficiently small, as the tunneling probability decays exponentially. The relation for the full tunneling distance is given by
When eliminating by inserting (5.2) in (5.3), the
relation for the output distance as a function of the input distance gives the second energetic condition as defined by the ratio of conduction band edge distance and trap level difference. Assuming a maximum field strength of
= 10 MV/cm, which a high quality insulator can sustain, and a conservative maximum tunneling distance of 2 nm together with the conservative condition that then leads to with = 2 eV. Based on these assumptions, both and - are required to be smaller than 2 eV to efficiently enable TAT currents. It has to be noted that additionally sufficiently fast charge transfer kinetics as enabled by the relatively small relaxation energies are needed,
as observed for polarons. Hence, the conclusion is drawn that polarons in gate stacks based on amorphous or polycrystalline binary oxides are likely to enable trap assisted tunneling currents.
5.2.4 Model Verification
In the past three sections, the capabilities of the TAT model to reproduce measured currents and the consistency of the employed NMP parameters with DFT calculations have been demonstrated. Within this section, an overview
of the impact of the individual model parameters together with the stochastic properties of the Monte Carlo sampling approach as well as the relevance of multi-TAT shall be discussed. In Figure 5.29, the impact of a variation of the defect density NT , trap level ET and relaxation energy ER on the IG (VG ) characteristic is shown for the
minimum and maximum . Here, the parameters are varied around the extracted values given in Table 5.7. Note that only simulations of single slabs with defects are shown, and therefore a stochastic variation of the presented results is expected. A scaling effect of the current density is mainly obtained from the NT variation, with minor impact on the IG (VG ) shape. A more
complex behavior is observed for the trap-level variation, as a shift towards the channel conduction band () can lead to severe charge trapping currents with shallow sloped TAT currents at ET = 1.7 eV and 2.1 eV, while a further increase of the trap level leads to smaller current densities at a higher bias set-in
point for the currents, c.f. discussion in the previous section. The relaxation energy mainly impacts the charge transfer kinetics, and can drastically change the shape of the IG (VG ) curves, as not steady-state but transient currents
are observed for larger ER . Additionally, increased ER leads to increased thermal activation of , while a relaxation energy reduction creates the opposite effect.
Close to the interface, the defect density is likely no longer uniformly distributed but is expected to increase due to the stoichiometric disorder and strains present within interfacial layers. Thus, the TAT currents are calculated for
an exponentially decaying distribution, as shown in Figure 5.30 with for scaling parameters of = 1 nm, 2 nm and 3 nm. As a result, the reproduction of the currents requires a defect density variation of NT = 1.5 × 1019/cm3,
5 × 1018/cm3 and 3 × 1018/cm3 for increasing respectively. Note that these NT are calculated within the maximum distance of the defect band. However, the density in the relevant distance for polaron conduction is fairly constant at about
8 × 1018/cm3, rendering the spatial defect density distribution a second order effect for the bulk polaron defects.
Another important aspect of the simulation accuracy is the stochastic variability due to Monte Carlo sampling. The stochastic properties of the extracted defect band of the SiC MOSCAPs are therefore shown in Figure 5.31 for different numbers of average defects = 1200 defects, 200 defects and 80 defects with = 100 samples each. While for the largest defect numbers no significant variations from the mean values can be observed, the smaller defect numbers result in large variability, as indicated by the error bars, representing
standard errors. Alternatively, the results can also be interpreted in terms of large to small area device variability. Hence, the impact of the Poisson distributed number of defects introduces an additional stochastic variation for
smaller defect numbers, an effect typically observed in small area devices. Even though the largest number of defects used for the simulation with a repetition of yields only a total device area of with , the variance around the mean value is small enough for an accurate representation of a large area device with electrode areas in the mm2 range. Such large devices are inevitable to accurately resolve the
measured tunneling current densities, as commercially available measurement equipment provides at best a current resolution in the tens of fA range.
As already discussed in Section 4.7, multi-TAT is unlikely to occur within the polaron band, as electrons are instantaneously transmitted to the insulator
conduction band after being captured from the reservoir electrode. Thus, the contribution of the “trapping" band with lower ET and ER within a range as typically observed for oxide defects is investigated with Dijkstra’s algorithm
for multi-trap assisted percolation. As can be seen from Figure 5.32, indeed multi-TAT percolation over two defects is obtained at a
voltage of 3.2 V. However, at this relatively high bias, the polaron assisted tunneling current dominates the observed leakage current in the TZT capacitor. Therefore, within the investigated technologies, multi-TAT
conduction plays a subordinate role. Nonetheless, a general conclusion about whether the effect can be neglected or not, cannot be drawn from these studies.
The introduction of the non-linear coupling within the Master equation (4.10) requires the iterative solution of the system through a
Newton scheme, whose convergence behavior depends on the initial value of the iteration and the defect coupling. When comparing the computation of the full formulation with the computational effort for the decoupled
(single-TAT) formulation, the computational cost is reduced by a factor of about 10 to 100 if the multi-TAT mechanism is neglected.
The leakage mechanisms of SiC/SiO2 MOSCAPs and MOSFETs have been analyzed in detail by employing a detailed TAT model together with the WKB based Tsu-Esaki model for band-to-band tunneling. All
important characteristics describing the involved charge transfer kinetics, e.g. temperature activation and transient shapes of IG (VG ), have been accurately reproduced when using only material parameters and physical defect
parameters. These parameters agree well with those obtained by DFT for polarons in SiO2. Further verification of the TAT model by accurately characterized leakage characteristics of TZT capacitors allows to identify
two defect bands responsible for TAT, of which the first is responsible for transient charge trapping currents. The leakage currents caused by the second band show similar characteristics as for the polaron band in
SiO2. Furthermore, the parameters of the second defect band perfectly match the defect properties obtained with DFT computations of polarons in partially re-crystallized ZrO2 models. Thus, polarons in
general are likely to lead to TAT currents in many material systems employing amorphous binary oxides as components of their gate stacks. This stems from their favorable energetic trap level alignment within the insulator that is
in between the electrode and insulator conduction band edges.