Erasmus Langer
Siegfried Selberherr
 
Elaf Al-Ani
Tesfaye Ayalew
Hajdin Ceric
Martin Della-Mea 
Siddhartha Dhar
Robert Entner 
Andreas Gehring 
Klaus-Tibor Grasser 
René Heinzl 
Clemens Heitzinger
Christian Hollauer
Stefan Holzer
Andreas Hössinger 
Gerhard Karlowatz 
Robert Kosik 
Hans Kosina 
Alexandre Nentchev
Vassil Palankovski
Mahdi Pourfath 
Philipp Schwaha
Alireza Sheikoleslami 
Viktor Sverdlov 
Stephan Enzo Ungersböck 
Stephan Wagner 
Wilfried Wessner
Robert Wittmann 

 

   
 

Clemens Heitzinger
Dipl.-Ing. Dr.techn.
heitzinger(!at)iue.tuwien.ac.at
Diss.
   
Biography:
Clemens Heitzinger was born in Linz, Austria, in 1974. After compulsory military service, he received the Diplomingenieur in technical mathematics and the Ph.D. degree in technical sciences from the Technische Universität Wien, Vienna, Austria, in 1999 and 2002, respectively. In 2000, he joined the Institute for Microelectronics, Technische Universität Wien. From March to May 2001, he also held a position as Visiting Researcher at the Sony Technology Center, Hon-Atsugi, Tokyo, Japan. His scientific interests include process simulation for semiconductor devices and applied mathematics for simulation in microelectronics.
He was awarded an Erwin Schrödinger Fellowship by the Austrian Science Fund (FWF) in 2003.

Three-Dimensional Topography Simulation on the Feature Scale

The deposition of thin layers and the etching of trenches are fundamental tasks for the production of memory cells, power MOSFETs, and backend stacks. The aim of the current work is to study topography processes, i.e., etching and deposition processes, on genuinely three-dimensional structures. The trenches studied are part of the manufacturing process of power MOSFETs, where voidless filling must be achieved. Another area of application is the capacitance extraction in interconnect structures, where the deliberate inclusion of voids serves the purpose of reducing overall capacitance. Furthermore, these simulations make it possible to analyze the variations on the feature scale depending on the position of the single trench on the wafer and in the reactor.

To that goal, the three-dimensional version of our topography simulator ELSA (Enhanced Level Set Applications) was completed. It includes narrow banding and a fast marching algorithm for the suitable extension of the speed function. The particle trajectories in the simulation domain are tracked via an iterative radiosity formulation. The ion angular distribution function entering the simulation domain and the location of the ion sources are determined by the plasma, and this information enters the feature scale simulation as a physical boundary condition. Depending on the energy of the particles, reflection happens either in the specular or luminescent regime.

Despite the magnitude of computational resources available today, care had to be taken in the choice of algorithms to achieve reasonable times for three-dimensional simulations.

Simulation applications are, e.g., the etching of T- and H-shaped trench junctions and their filling with silicon dioxide. These geometries require truly three-dimensional simulations which were used for optimizing the manufacturing steps of power MOSFETs for automotive applications. The simulator was found to be applicable to a wide range of both etching and deposition problems and to yield predictive simulations within a reasonable time frame.


Three-dimensional directional etching
of a rectangular trench
   
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