Iue Annual Review 2012

Biography:
Wolfgang Gös was born in Vienna, Austria, in 1979. He studied technical physics at the Technische Universität Wien, where he received the degree of Diplomingenieur in 2005. In January 2006, he joined the Institute for Microelectronics and focussed on modeling of the bias temperature instability. In 2007, he was a visitor at the Vanderbilt University in Nashville, TN. In 2011, he received his doctoral degree and holds a post-doc position at the Institute for Microelectronics, where he continues his research activities in reliability issues of semiconductor devices. His current scientific interests include atomistic simulations, the chemical and physical processes involved in NBTI and HCI, and reliability issues in general.

Gate Current Fluctuations in Nanoscale Devices

Due to the continuous downsizing of Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), a keen interest has aroused in how the capture or the emission of single charges can affect device reliability. In numerous publications, Random Telegraph Noise (RTN) in the drain current is unambiguously linked to the capture and emission processes (charge trapping). Thereby, investigations based on time-dependent defect spectroscopy have provided deep insight into the microscopic physics behind these processes and have allowed a better understanding of current reliability issues, such as the Negative Bias Temperature Instability (NBTI). In a recent experimental publication, additional fluctuations of the gate current have been observed and found to be occasionally correlated with fluctuations in the drain current (see figure 1), suggesting that a trapped charge somehow allows for Trap-Assisted Tunneling (TAT). In literature, this tunneling mechanism is usually modeled as a sequence of two Nonradiative Multi- Phonon (NMP) processes. Strikingly, such processes have already been used to explain reliability issues, such as NBTI.
As a consequence, our previously suggested multi-state model for NBTI has been extended in order to account for the charge exchange with the gate. In this comprehensive model, the TAT current consists of two consecutive steps – namely, hole capture from the substrate (from state 1' to state 2) followed by hole emission to the poly gate (from state 2 back to state 1'). As shown in figure 2, the resulting TAT current only occurs for the positive charge state of the defect and can be switched on by hole capture (from state 1 to state 2) or turned off again via hole emission (from state 2 to state 1). Naturally, this model can be generalized as electron trapping. The field and temperature dependence of the TAT current contains valuable information about the defect properties, such as the trap levels and the barrier heights of the NMP transitions, and thus will provide a more detailed description of the defect.

Figure 1. Comparison of the simulated traces of the drain current (top) and the gate current (bottom).

Figure 2. State diagram of the defect in the extended multi-state model.