The pace of aggressive scaling of device structures and the related performance gain in the last 20 years is increasingly difficult to maintain. High mobility channel materials, such as strained silicon with novel layout and device geometries, are being increasingly sought. However, to enable the design of novel strain-based device structures, it is imperative to accurately model carrier mobilities in this system for different stress/strain conditions.
A physically based low-field bulk electron mobility model for Si under arbitrary stress conditions has been developed. The model includes valley splitting for a given strain tensor, the effect of reduced inter-valley scattering with increasing splitting. In addition to doping and temperature dependence, the model has been extended to account for the effect of the variation of the electron effective mass in the presence of shear stress. A systematic study of the electron high-field transport in Si under biaxial and uniaxial stress conditions using full-band Monte Carlo (MC) simulations has also been performed. A strain-dependent empirical model describing the velocity vector as a function of the magnitude and direction of the electric field for arbitrary field directions has been developed. All these models have been implemented in the general-purpose device simulator Minimos-NT.
The device simulator has been used to investigate the so-called d-dotFET structure, which is a novel device structure that utilizes the advantages of strain and SOI technology. The d-dotFET structure shown in Fig. 1, relies on the growth of self-assembly of coherent defect-free Ge dots on Si followed by the growth of a Si capping layer on top of the Ge dots. After the formation of the gate oxide on the top of the capping layer, the Ge dot underneath is removed, leaving behind a free-standing Si bridge that forms the channel of the transistor. The resulting Si channel is thus strained with the strain distribution being non-uniform. Simulations show that the strain distribution delivers more than 30% improvement in the linear drain current and more than 10% improvement in the saturation drain current as compared to the unstrained case, as can be seen in Fig. 2.