The breathtaking increase in computer performance is supported by the scalability of MOSFETs. The scaling theory has so far guaranteed an increase in transistor performance for each generation, and almost no changes have been required in transistor design until recently. However, with the 65 nm technology node in production, it becomes increasingly difficult to maintain the projected performance gain per generation while keeping the device leakage current within limits. In order to meet the projected performance gain per generation, novel engineering solutions are required to enhance the conventional scaling. Several options are available. New device architectures based on silicon-on-insulator (SOI) technology and multi-gate structures improve the channel control. Other options are mobility enhancement due to stress and reduction of leakage due to alternative gate oxide materials. Accurate transport modeling in SOI FETs for arbitrary substrate orientations and general stress conditions becomes the important issue, because it helps to reduce technology-development costs.
Degeneracy effects and intersubband scattering start determining electron mobility in single- and double-gate SOI FETs with a thin silicon body. This prompts the development of new, efficient Monte Carlo algorithms for transport simulations which take these effects into account. Technologically relevant stress in [110] direction produces off-diagonal elements of the strain tensor, which induce pronounced modification of the Si conduction band. Variations of both transversal and longitudinal masses with stress and valley shifts must be included in MOSFET transport models.
Scaling of MOSFETs below the 65 nm technology node makes the theoretical description and modeling of carrier transport in these devices challenging. The channel in such devices is so short that the carrier transport starts to be determined by quantum mechanical effects. The two major quantum effects to be taken into account are size quantization in the channel and quantum mechanical tunneling along the channel. Both effects call into question the use of powerful and well-developed simulation methods based on the semiclassical Boltzmann equation. Continued scaling of the MOSFET feature size well below 45 nm requires the development of new simulation techniques capable of incorporating the quantum effects properly. One of the promising approaches developed at the institute is the Wigner function method. An attractive feature of the Wigner function approach is that it also includes all scattering mechanisms in a natural way via the Boltzmann scattering integrals, allowing the development of a transport model which accounts for both quantum interference phenomena and realistic scattering mechanisms.