Charge Trapping and Variability in CMOS Technologiesat Cryogenic Temperatures

7.4 RTN in SiON Devices

In the following section RTN measurements on Tech. B are presented. While for the time zero characterization large area devices with \( W\times L = 10 \times \SI {10}{\micro \meter ^2} \) have been used, scaled devices with \( W\times L = 0.22 \times \SI {0.18}{\micro \meter ^2} \) are used for the presented noise analysis. A set of both nMOS and pMOS devices with this geometry has been scanned to find transistors with active RTN defects. In total 3 nMOS devices (defect A-C) and 1 pMOS device (defect D) with RTN signals which could be followed over a range of gate voltages and temperatures have been found. The analysis of the measured signals was performed using the Canny edge detector discussed in Section 7.3.1.

7.4.1 Temperature and Gate Voltage Variation

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Figure 7.6: The recorded RTN signal at \( T=\SI {9}{\kelvin } \) and \( \vg =\SI {557.5}{\milli \volt } \) (top, the good) allows a step extraction using the Canny edge detector and the extraction of the normally distributed step heights and the exponentially distributed capture and emission times. Moving to a higher \( \vg =\SI {582.5}{\milli \volt } \) (center, the bad) results in very small capture times. The extraction of the step heights and the time constants is still possible, however, the distribution of (math image) is truncated due to the limitation of the measurement window. At a higher temperature \( T=\SI {44}{\kelvin } \) (bottom, the ugly) the remains of the RTN signal can still be observed, however, a step detection is not possible anymore. Figures taken from [MJC4].

An ideal measurement can be seen in Fig. 7.6 (the good) for a nMOS device at \( T=\SI {9}{\kelvin } \) and \( \vg =\SI {557.5}{\milli \volt } \). The steps can be easily detected with the Canny edge detector, as indicated with the red lines. The extraction of the step heights shows two Gaussian distributions (\( \overline {\eta }=\SI {0.9}{\milli \volt } \), \( \sigma _\eta =\SI {0.1}{\milli \volt } \)) and the capture and emission times are exponentially distributed. However, these ideal conditions are only observed for a rather small measurement window. When sweeping over a large set of gate voltages, for higher and lower voltages the charge transition times become very small or very large. This has the effect that the signal shows extremely narrow peaks as can be seen in Fig. 7.6 (the bad), again at \( T=\SI {9}{\kelvin } \) but at a higher gate voltage of \( \vg =\SI {582.5}{\milli \volt } \). These sharp peaks still allow a reasonable extraction of the step heights, as can be seen in the Gaussian distributions (\( \overline {\eta }=\SI {0.9}{\milli \volt } \), \( \sigma _\eta =\SI {0.15}{\milli \volt } \)). However, the extraction of the capture times \( \tauc \) is limited by the measurement resolution and thus the exponential distribution shows a cut off. While these truncated signals still allow to extract useful parameters, this becomes difficult at higher temperatures. At \( T=\SI {44}{\kelvin } \) in Fig. 7.6 (the ugly) one can clearly see the remains of the clear RTN signal seen before, however, a parameter extraction has become impossible. Nevertheless, across a certain temperature and voltage range it is possible to follow the defects and to extract step heights, capture and emission times.

The scan across temperatures and gate voltages can be seen in Fig. 7.7. At every set of \( (T, \vg ) \) it is possible to extract a capture time (math image) (red) and an emission time (math image) (blue), as can be seen for \( T=4, 9, 14, 19, 24, \SI {29}{\kelvin } \) for \( \vg \) between \( \SI {0.54}{\volt } \) and \( \SI {0.58}{\volt } \). The capture time shows a strong gate voltage dependence, whereas the emission time is almost (math image) independent, as known from other technologies [114], however, both can be fitted linearly on the log-scale. These linear fits for (math image) and (math image) intersect at the gate voltage where \( \tauc =\taue \). At this (math image) the trap level is aligned with the semiconductor Fermi level and it will be used later in this section to study the \( T \)-dependence of the corresponding transition times.

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Figure 7.7: Mean capture and emission time extracted for \( T=\SI {4}{\kelvin },\SI {9}{\kelvin },\SI {14}{\kelvin },\SI {19}{\kelvin },\SI {24}{\kelvin } \) and 29 K and gate voltages between \( \vg =\SI {540}{\milli \volt } \) and 580 mV. While (math image) is almost (math image) independent, (math image) shows a strong, exponential (math image) dependence. Both (math image) and (math image) can be fitted linearly (on the log-scale) and the intersection point \( \tauc =\taue       \) can be found (purple stars) for every temperature. At this point, the Fermi level is aligned with the trap level.

Extraction of Step Heights

As shown in the previous section, the distribution of step heights can be extracted for every signal at a certain \( T \) and (math image). By extracting the means of these typically Gaussian distributions it is possible to find the \( T \) and (math image) dependence of the mean step heights (math image). The gate voltage dependence of (math image) for different temperatures can be seen for defect \( A \) and defect \( D \) in Fig. 7.8. For nMOS, the mean step heights decrease with increasing (math image). This can be attributed to the fact that the channel uniformity increases with increasing (math image) and thus the impact of a single charge on the drain-source current decreases [240]. This mechanism is temperature independent, as can be seen in the figure. The same observation holds for pMOS, where with decreasing (math image) the step heights decrease, as can be seen for defect \( D \) in Fig. 7.8.

Using the extracted (math image), (math image) for different (math image) in Fig. 7.7, it is possible to compute the interpolated (math image) at the point where \( \tauc =\taue \). This can be done for a range of temperatures to obtain the \( T \) dependence of (math image). Again, it can be seen that the step height is nearly temperature independent in this cryogenic temperature range.

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Figure 7.8: The step heights of defects A-D show a weak dependence on the applied (math image) and \( T \). Defect A on nMOS (upper left) shows that with increasing (math image) the step heights decrease slightly due to the higher channel uniformity and the stronger impact of the drain-source current on a single charge. On pMOS devices the same effect appears with decreasing (math image) (upper right). While (math image) affects (math image), the average step heights are almost unaffected by the temperature change, as can be seen in the lower panels. Figures taken from [MJC4].

Extraction of Average Capture and Emission Times

For the analysis of the \( T \) and (math image) dependence of the average capture and emission times (math image) and (math image), again the extractions as shown in Fig. 7.7 are used. Now, in Fig. 7.9 the average times are shown in a more compact way with all measured temperatures in a single plot for defect A and D. Within this single plot it can be clearly seen that the measured (math image) and (math image) curves shift towards faster capture and emission times with increasing temperatures.

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Figure 7.9: Capture and emission times for defect A and D can be analyzed in the same way as shown in Fig. 7.7 but presented in a more compact way with the whole temperature set in a single figure. This representation shows that mean capture and emission times get smaller with increasing temperatures, leading to higher charge transition rates. Figures taken from [MJC4].

The marked stars in Fig. 7.9 where \( \taue =\tauc \) holds can be plotted in an Arrhenius-plot, see Fig. 7.10. It can be seen that the charge transition times become temperature independent at cryogenic temperatures in both nMOS and pMOS devices. This temperature independent regime can be modeled using Comphy with the implemented quantum mechanical transition rates, as discussed in detail in Chapter 3. The solid lines, representing the simulation, show that nuclear tunneling explains the temperature independent behavior of charge trapping at cryogenic temperatures, whereas the classical model (dashed lines) freezes out completely. Nuclear tunneling at cryogenic temperatures is dominated by the overlap of the ground vibrational states of the initial and final states. These ground states are occupied, even at 4 K, and enable charge transitions.

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Figure 7.10: The extracted charge transition times at the point where \( \tauc =\taue       \) becomes temperature independent at cryogenic temperatures for all characterized defects instead of an Arrhenius-like behavior. This can be explained by nuclear tunneling, which is dominated by the overlap of the vibrational ground states, which are the only occupied states at cryogenic temperatures. This can be accurately modeled using the full quantum mechanical 2-state NMP theory (solid lines), while the classical approximation (dashed lines) freezes out completely. Figures taken from [MJC4].

The simulation allows to find a pre-existing defect with a parameter set of trap level (math image), relaxation energy (math image), configuration coordinate offset (math image), and position in the oxide (math image) which describes the measured temperature dependence of the charge transition times of the RTN signal. The extracted parameters for every defect are listed in Tab. 7.1.

Defect Device \( E_\mathrm {T} \) [eV] \( E_\mathrm {R} \) [meV] \( x_\mathrm {T} \) [nm] \( \Delta Q \) [\( \SI {}{\sqrt {u}\angstrom } \)] \( E_\mathrm {B} \) [meV]
Defect A nMOS 0.44 110 0.2 3.5 28
Defect B nMOS 0.48 95 0.3 3.0 24
Defect C nMOS 0.46 60 0.05 2.6 15
Defect D pMOS -0.48 100 0.25 3.0 25

Table 7.1: The extracted temperature dependence of the charge transition times allows to extract trap levels, relaxation energies, spacial positions and configuration coordinate displacements of defect candidates for the measured RTN signals.

The extracted spatial and energetic position are shown in Fig. 7.11. As can be seen, the electrically active defects on nMOS (left) are close to the conduction band edge. The active defect in the pMOS device, on the other hand, is close to the valence band edge of the substrate. This energetic alignment guarantees charge transition times with \( \tauc =\taue \). The spatial position of all defects is less than 0.5 nm from the Si/SiO2  interface. This, together with the trap level alignment strongly indicates that the defects responsible for RTN in cryogenic environments are interface defects.

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Figure 7.11: The band diagrams show the spatial and energetic position of the extracted RTN defects. As can be seen, the defects measured on nMOS are very close to the conduction band edge, the defect on pMOS close to the valence band edge. Spatially the defects are very close to the interface between the oxide and the Si substrate. This spatial position together with the extracted trap levels and relaxation energies strongly indicate that the defects responsible for RTN at cryogenic temperatures are interface defects. Figures taken from [MJC4].

This idea can further be supported by DFT calculations. The regions marked as oxide defects in Fig. 7.12 are extracted from [MJJ2]. The extracted (math image) and (math image) parameters are in good agreement for possible oxide defect candidates [MJJ2]. The ellipsoid formed region marked as interface defects within the Si bandgap is extracted from [142]. It shows that interface defects are expected to have low relaxation energies compared to oxide defects. The colored circles represent Defect A to D discussed in this section. As can be seen, the extracted values are in good agreement with the DFT calculations for interface defects, which are highlighted in Fig. 7.12.


Figure 7.12: The \( (\Et ,\Er ) \)-heatmap shows the active regions for oxide defects, extracted in [MJJ2] and for interface defects, extracted in [142]. Interface defects show smaller relaxation energies compared to oxide defects and are energetically located close to the band edges or in the bandgap. These properties agree with the extracted defect parameters of the RTN defects A to D. Figure taken from [MJC4].