In this last Chapter a short summary of the presented work is given followed by an outlook for further development of our experimental setups and future investigations to deepen the understanding of bias temperature instabilities.
To ensure the failure resistant operation of complex integrated CMOS circuits, the reliable functionality of MOSFETs has to be guaranteed. Due to the fast progress in the scaling of the transistor geometries, state-of-the art MOSFETs have reached the deca-nanometer regime. The time-to-failure of such nanoscale transistors is considerably affected by BTI which is due to charge trapping at single defects located in the dielectrics and at the semiconductor/dielectrics interface.
Over the last decades many efforts have been made to discovery the mechanism behind BTI. Most of them were carried out on large-area transistors. However, only the average response of a huge number of defects can be studied in such devices. In order to understand the physics behind the trapping mechanism responsible for the degradation of the device performance, the charge trapping kinetics of single defects has to be properly resolved. For this the time-dependent defect spectroscopy has been proposed. Using TDDS, discrete threshold voltage shifts caused by single defects can be studied individually in modern nanoscale transistors. As a consequence, the bias and temperature dependent capture and emission times of single defects can be studied in considerable detail. To explain the trapping kinetics the four-state non-radiative multiphonon model is used.
The bottleneck to perform TDDS studies has been the availability of a suitable measurement setup which supports all requirements of the TDDS. Commercial measurement setups are typically applied to study BTI in large-area transistors. Usually such setups suffer from limitations in handling, measurement speed or limited controlability and are mostly combinations of custom-made circuits with general purpose instruments. In order to guarantee unlimited control of the measurement sequences and to ensure signal integrity, the time-dependent defect spectroscopy measurement instrument has been developed. The TMI is designed to rigorously study single charge trapping in nanoscale transistors. This is possible because the TMI provides a very high current measurement resolution in the sub-picoampere regime and allows to sample the data with high frequencies up to . Particularly notable is the modular design of the TMI which allows a flexible adjustment of the configuration for its use in combination with computer-controlled furnaces, probestations or standalone applications. An additional benefit of the TMI is the long-term stability regarding uninterrupted measurements. So far single traces up to have been recorded and long-time experiments up to eight month have been performed without any interrupt.
As NBTI in pMOSFETs is commonly studied, the initial single charge trapping measurements using TDDS were performed on these devices. It was found that charge emission times can have bias-independent or bias-dependent characteristics, fixed oxide traps versus switching traps, whereas the charge capture time was observed to be strongly bias-dependent. Furthermore, charge trapping was found to be thermally activated. This raises the question whether single defects causing PBTI in nMOSFETs show a similar response of their transition times to different biases and temperatures or not. Similar to the pMOS case, the characterized single defects causing PBTI showed fixed oxide trap and switching trap behavior. Additionally, charge trapping was found to be thermally activated with activation energies in the same range as measured for pMOSFETs. As a consequence, the same trapping mechanism has to be responsible for NBTI in pMOSFETs and PBTI in nMOSFETs. This idea is supported by DFT calculations which demonstrated that single defects can also contribute to electron trapping. Finally, we demonstrated that the trapping kinetics of the analyzed electron traps can be well explained by the four-state NMP model.
Charge trapping was also studied in quantum-well high-k SiGe transistor. These devices were initially introduced to further enhance the performance of pMOSFETs as they exploit a higher channel mobility. However, a particular immunity to NBTI was observed for these devices. In order to explain this puzzling immunity, we studied single defects in nanoscale device variants with two different Si cap layer thicknesses and a reference device. The reduction of NBTI was found to be due to a beneficial re-alignment of the defect band in the oxide with respect to the conducting channel, which is a consequence of the Si cap layer. Using the four-state NMP model the charge trapping kinetics of 23 single defects and the continuous recovery behavior of the large-area counterparts could be explained. Finally, based on the measurement data and the performed simulations, the lifetime of the SiGe devices is demonstrated to easily outperform the lifetime of conventional Si transistors.
Finally, the permanent component of BTI was studied. To explain the permanent threshold voltage shift, the double-well model was used so far because of its simplicity, however, a more accurate description of the permanent contribution was needed particularly for these SiGe devices. Therefore, long time experiments over eight month were performed using the TMI. It was found that even at zero bias at all four terminals, a significant drift of the threshold voltage shift is observed. This shift gets more pronounced at higher temperatures and at higher biases. By using the newly developed hydrogen release model the permanent threshold voltage shifts observed in our experiments were described very well. This is achieved by creation of new defects at the channel site due to the reaction of precursors with hydrogen species. Thereby the required hydrogen is provided as interstitial hydrogen which is released at the gate side and moves towards the interface. Close to the interface the interstitial hydrogen can become trapped and new defects are created. These newly created interface defects have very large time constants and therefore contribute to the permanent threshold voltage shift.« PreviousUpNext »Contents