As discussed in the previous parts of this thesis, BTI is often considered to be the sum of a recoverable and a permanent threshold voltage shift. To understand both partial contributions to this puzzling phenomenon, tremendous efforts have been put towards an explanation of the observed threshold voltage shift. In contrast to the recoverable component, the study of the permanent threshold voltage shift is even more involved s it is mostly overshadowed by the former. According to the prevalent opinion, the permanent threshold voltage shift is due to single defects with large time constants, commonly referred to as interface states [139, 185, 145, 144, 186, 156, 187]. In the following a measurement sequence deliberately designed to study the recoverable and permanent component simultaneously is introduced. By performing ultra-long time experiments over several month, the evolution of the permanent threshold voltage shift is recorded and analyzed. To explain the newly collected data the hydrogen release model, see Section 7.4.2, is used.
To monitor threshold voltage shift due to NBTI in pMOSFETs, simple stress/measure sequences are commonly used. We extended this procedure by a set of sweeps, recorded prior and after the stress/measure cycle is applied, see Figure 13.1.
As can be seen, the accumulated during stress is not completely reversed after recovery. Obviously, a significant number of defects with very large time constants is present which determine the permanent component of . To access the remaining typically ten sweeps are measured after recovery thereby removing a significant amount of the trapped charge. Next, the permanent can be extracted at different gate biases using the sweeps, see Figure 13.2.
We define the permanent component as the difference in the gate voltage between the down-sweep and corresponding up-sweep of the measured sweeps
extracted at a certain gate bias by considering the same drain-source current. Remarkably, extracted from the first sweep performed from inversion to accumulation is strongly reduced towards decreasing absolute gate bias. This is a consequence of a larger number of traps remaining charged at the end of the recovery phase. In contrast, the analysis of the subsequent sweeps show a nearly flat dependence on . As the interface states are typically supposed to be the main culprit for , a peak arranged slightly above the of the pMOSFET is expected. Figure 13.2 b shows the area where contributions of interface states are expected, calculated considering at above the valence band . However, no contribution is this region is measured. Finally,
is taken as a measure for the permanent component remaining after our proposed measurement sequence.
In order to elucidate the evolution of , the TMI together with a computer controlled furnace is used. The latter is necessary to achieve defined device temperatures and controlled temperature gradients when the temperature is changed. Using our sophisticated setup, is studied over several month on a single transistor mounted into a conventional ceramic package. As the time constants of the defects responsible for are very large, temperature accelerated experiments are performed, see Figure 13.3.
To minimize the measurement noise, the permanent component of is again extracted using equation (13.2).« PreviousUpNext »Contents