A conventional n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) is shown in Figure 4.2.
Such devices consist of a poly-Si gate on top of the insulator. However, imperfections of the ideal are introduced either during device fabrication or due to interfaces between different materials. These deviations from the ideal atomic structure can lead to electrically active sites considered as charge traps in MOS structures. In the commonly used terminology traps occurring in thermally grown are classified into [25, 26]
• fixed oxide charges, due to structural defects in the near the /Si interface,
• mobile ionic charges, due to impurities,
• oxide trapped charges, due to trapped charges in the ,
• border traps, which are defined to be located within the first of the , and
• interface states, a consequence of the lattice mismatch between crystalline Si bulk and the amorphous insulator.
This phenomenological classification is shown in Figure 4.3.
The thickness of the gate dielectric layers of modern transistors is below , a consequence of the scaling of device geometries into the sub-nanometer regime. Thus traps in the oxide are commonly referred to as border traps. The border traps and interface states are both the most prominent point defects responsible for aging of the MOSFETs.
In Figure 4.4 the characteristics of an ideal defect-free and a fabricated n-channel MOSFET (nMOSFET) are compared.
As can be seen, both devices differ in their threshold voltage, sub-threshold slope and on current. The shift of the threshold voltage is caused by border traps, whereas the interface states are responsible for the reduction of the sub-threshold slope, as they degrade the channel mobility. These charges , are distributed through the oxide and determine the total threshold voltage shift [27, 28]
the oxide capacitance per unit area and the oxide thickness. The average produced by negatively charged traps approximated using the charge sheet approximation is
Furthermore the accumulated during bias temperature instabilities (BTI) stress can be expressed in terms of a change of the oxide and interface charges and . For the interface charges the charge capture and emission is assumed to be very fast. Thus the charge associated with these states follows the Fermi-level directly and can be expressed by 
with the time-dependent density of interface states and their occupancy. When a large negative bias temperature instabilities (NBTI) stress bias is applied the Fermi-level is close to the valence band edge which corresponds to . As a consequence all interface states which are generated during stress become charged. In contrast to the fast charge transitions associated with interface states, the charging and discharging of oxide traps has considerable larger transition times. As in that case the occupancy cannot directly follow the Fermi-level the oxide charge is given by 
with the spatially dependent density of oxide traps and the corresponding occupancy. Note that the impact of a single charge on strongly depends on the position of the oxide trap. The closer the trap is located to the channel, the larger the impact of the trap on the , and implicitly on the threshold voltage, is.
Finally, the contributions of the interface states and oxide charges to the total threshold voltage shift can be summarized to
with the corresponding trap densities. The time-dependent directly follows from changes of the interface trap density and oxide charge density. Such charging and discharging interactions are dynamic processes and can be describe statistically, see Section 7.« PreviousUpNext »Contents